On Fri, May 29, 2020 at 12:26:10PM +0300, Andy Shevchenko wrote:
> On Fri, May 29, 2020 at 11:12:04AM +0300, Serge Semin wrote:
> > On Fri, May 29, 2020 at 10:55:32AM +0300, Andy Shevchenko wrote:
> > > On Fri, May 29, 2020 at 7:02 AM Serge Semin
> > > wrote:
> > > >
> > > > Even if DMA transactio
On Fri, May 29, 2020 at 11:12:04AM +0300, Serge Semin wrote:
> On Fri, May 29, 2020 at 10:55:32AM +0300, Andy Shevchenko wrote:
> > On Fri, May 29, 2020 at 7:02 AM Serge Semin
> > wrote:
> > >
> > > Even if DMA transactions are finished it doesn't mean that the SPI
> > > transfers are also complet
On Fri, May 29, 2020 at 10:55:32AM +0300, Andy Shevchenko wrote:
> On Fri, May 29, 2020 at 7:02 AM Serge Semin
> wrote:
> >
> > Even if DMA transactions are finished it doesn't mean that the SPI
> > transfers are also completed. It's specifically concerns the Tx-only
> > SPI transfers, since there
On Fri, May 29, 2020 at 7:02 AM Serge Semin
wrote:
>
> Even if DMA transactions are finished it doesn't mean that the SPI
> transfers are also completed. It's specifically concerns the Tx-only
> SPI transfers, since there might be data left in the SPI Tx FIFO after
> the DMA engine notifies that t
Even if DMA transactions are finished it doesn't mean that the SPI
transfers are also completed. It's specifically concerns the Tx-only
SPI transfers, since there might be data left in the SPI Tx FIFO after
the DMA engine notifies that the Tx DMA procedure is done. In order to
completely fix the pr
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