Hi Krzysztof,
On 09/30/2015 04:26 PM, Krzysztof Kozlowski wrote:
On 30.09.2015 17:20, Yakir Yang wrote:
Hi Krzysztof,
On 09/30/2015 03:34 PM, Krzysztof Kozlowski wrote:
On 30.09.2015 16:19, Yakir Yang wrote:
Hi Krzysztof,
On 09/30/2015 01:32 PM, Krzysztof Kozlowski wrote:
On 22.09.2015
On 30.09.2015 17:20, Yakir Yang wrote:
> Hi Krzysztof,
>
> On 09/30/2015 03:34 PM, Krzysztof Kozlowski wrote:
>> On 30.09.2015 16:19, Yakir Yang wrote:
>>> Hi Krzysztof,
>>>
>>> On 09/30/2015 01:32 PM, Krzysztof Kozlowski wrote:
On 22.09.2015 16:37, Yakir Yang wrote:
> Both hsync/vsync
On 30.09.2015 16:19, Yakir Yang wrote:
> Hi Krzysztof,
>
> On 09/30/2015 01:32 PM, Krzysztof Kozlowski wrote:
>> On 22.09.2015 16:37, Yakir Yang wrote:
>>> Both hsync/vsync polarity and interlace mode can be parsed from
>>> drm display mode, and dynamic_range and ycbcr_coeff can be judge
>>> by
On 30.09.2015 16:19, Yakir Yang wrote:
> Hi Krzysztof,
>
> On 09/30/2015 01:32 PM, Krzysztof Kozlowski wrote:
>> On 22.09.2015 16:37, Yakir Yang wrote:
>>> Both hsync/vsync polarity and interlace mode can be parsed from
>>> drm display mode, and dynamic_range and ycbcr_coeff can be judge
>>> by
On 30.09.2015 17:20, Yakir Yang wrote:
> Hi Krzysztof,
>
> On 09/30/2015 03:34 PM, Krzysztof Kozlowski wrote:
>> On 30.09.2015 16:19, Yakir Yang wrote:
>>> Hi Krzysztof,
>>>
>>> On 09/30/2015 01:32 PM, Krzysztof Kozlowski wrote:
On 22.09.2015 16:37, Yakir Yang wrote:
> Both hsync/vsync
Hi Krzysztof,
On 09/30/2015 04:26 PM, Krzysztof Kozlowski wrote:
On 30.09.2015 17:20, Yakir Yang wrote:
Hi Krzysztof,
On 09/30/2015 03:34 PM, Krzysztof Kozlowski wrote:
On 30.09.2015 16:19, Yakir Yang wrote:
Hi Krzysztof,
On 09/30/2015 01:32 PM, Krzysztof Kozlowski wrote:
On 22.09.2015
On 22.09.2015 16:37, Yakir Yang wrote:
> Both hsync/vsync polarity and interlace mode can be parsed from
> drm display mode, and dynamic_range and ycbcr_coeff can be judge
> by the video code.
>
> But presumably Exynos still relies on the DT properties, so take
> good use of mode_fixup() in to
On 22.09.2015 16:37, Yakir Yang wrote:
> Both hsync/vsync polarity and interlace mode can be parsed from
> drm display mode, and dynamic_range and ycbcr_coeff can be judge
> by the video code.
>
> But presumably Exynos still relies on the DT properties, so take
> good use of mode_fixup() in to
Both hsync/vsync polarity and interlace mode can be parsed from
drm display mode, and dynamic_range and ycbcr_coeff can be judge
by the video code.
But presumably Exynos still relies on the DT properties, so take
good use of mode_fixup() in to achieve the compatibility hacks.
Signed-off-by:
Both hsync/vsync polarity and interlace mode can be parsed from
drm display mode, and dynamic_range and ycbcr_coeff can be judge
by the video code.
But presumably Exynos still relies on the DT properties, so take
good use of mode_fixup() in to achieve the compatibility hacks.
Signed-off-by:
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