The new Tegra CPU Idle driver now has a unified code path for the coupled
LP2/CC6 state, this allows to enable the deepest idling state on Tegra30
SoC where the whole CPU cluster is power-gated.
Signed-off-by: Dmitry Osipenko <dig...@gmail.com>
---
drivers/cpuidle/cpuidle-tegra.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/cpuidle/cpuidle-tegra.c b/drivers/cpuidle/cpuidle-tegra.c
index a926d2781227..a30a5e4fc863 100644
--- a/drivers/cpuidle/cpuidle-tegra.c
+++ b/drivers/cpuidle/cpuidle-tegra.c
@@ -325,7 +325,6 @@ static int tegra_cpuidle_probe(struct platform_device *pdev)
tegra_idle_driver.states[TEGRA_C7].disabled = true;
break;
case TEGRA30:
- tegra_idle_driver.states[TEGRA_CC6].disabled = true;
break;
case TEGRA114:
case TEGRA124:
--
2.23.0
