Hi Robin,
On 26/08/2016 03:17, Robin Murphy wrote:
> Hi Eric,
>
> On Fri, 26 Aug 2016 00:25:34 +0200
> Auger Eric wrote:
>
>> Hi Robin,
>>
>> On 23/08/2016 21:05, Robin Murphy wrote:
>>> When an MSI doorbell is located downstream of an IOMMU, attaching
>>> devices to a DMA ops domain and switch
Hi Eric,
On Fri, 26 Aug 2016 00:25:34 +0200
Auger Eric wrote:
> Hi Robin,
>
> On 23/08/2016 21:05, Robin Murphy wrote:
> > When an MSI doorbell is located downstream of an IOMMU, attaching
> > devices to a DMA ops domain and switching on translation leads to a
> > rude shock when their attempt
Hi Robin,
On 23/08/2016 21:05, Robin Murphy wrote:
> When an MSI doorbell is located downstream of an IOMMU, attaching
> devices to a DMA ops domain and switching on translation leads to a rude
> shock when their attempt to write to the physical address returned by
> the irqchip driver faults (or
On 24/08/16 09:16, Thomas Gleixner wrote:
> On Tue, 23 Aug 2016, Robin Murphy wrote:
>> +cookie = domain->iova_cookie;
>> +iovad = &cookie->iovad;
>> +
>> +spin_lock(&cookie->msi_lock);
>> +list_for_each_entry(msi_page, &cookie->msi_page_list, list)
>> +if (msi_page->phy
On Tue, 23 Aug 2016, Robin Murphy wrote:
> + cookie = domain->iova_cookie;
> + iovad = &cookie->iovad;
> +
> + spin_lock(&cookie->msi_lock);
> + list_for_each_entry(msi_page, &cookie->msi_page_list, list)
> + if (msi_page->phys_hi == msg->address_hi &&
> +
When an MSI doorbell is located downstream of an IOMMU, attaching
devices to a DMA ops domain and switching on translation leads to a rude
shock when their attempt to write to the physical address returned by
the irqchip driver faults (or worse, writes into some already-mapped
buffer) and no interr
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