On Tue, Feb 09, 2021 at 04:28:29PM -0500, Lyude Paul wrote:
> With the introduction of gen9_bc, where Intel combines Cometlake CPUs with
> a Tigerpoint PCH, we'll need to introduce new DDC pin mappings for this
> platform in order to make all of the display connectors work. So, let's do
> that.
>
With the introduction of gen9_bc, where Intel combines Cometlake CPUs with
a Tigerpoint PCH, we'll need to introduce new DDC pin mappings for this
platform in order to make all of the display connectors work. So, let's do
that.
Changes since v4:
* Split this into it's own patch - vsyrjala
Cc:
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