) ;
> John Garry ; pa...@codeaurora.org;
> vkil...@codeaurora.org; rruig...@codeaurora.org; linux-a...@vger.kernel.org;
> linux-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org; Linuxarm
> ; neil.m.lee...@gmail.com
> Subject: Re: [PATCH v5 2/4] perf: add arm64 smmuv3
On 30/11/2018 15:47, Shameer Kolothum wrote:
From: Neil Leeder
Adds a new driver to support the SMMUv3 PMU and add it into the
perf events framework.
Each SMMU node may have multiple PMUs associated with it, each of
which may support different events.
SMMUv3 PMCG devices are named as
> jean-philippe.bruc...@arm.com; pa...@codeaurora.org; John Garry
> ; will.dea...@arm.com; rruig...@codeaurora.org;
> Linuxarm ; linux-kernel@vger.kernel.org;
> linux-a...@vger.kernel.org; Guohanjun (Hanjun Guo)
> ; linux-arm-ker...@lists.infradead.org
> Subject: Re: [PATCH v5 2/4] perf:
On 23/01/2019 12:14, Andrew Murray wrote:
[...]
+static inline void smmu_pmu_counter_set_value(struct smmu_pmu
*smmu_pmu,
+ u32 idx, u64 value)
+{
+ if (smmu_pmu->counter_mask & BIT(32))
+ writeq(value, smmu_pmu->reloc_base +
On Wed, Jan 23, 2019 at 11:02:48AM +, Shameerali Kolothum Thodi wrote:
> Hi Andrew,
>
> Thanks for taking a look at this.
>
> > > From: Neil Leeder
> > >
> > > Adds a new driver to support the SMMUv3 PMU and add it into the
> > > perf events framework.
> > >
> > > Each SMMU node may have
dead.org
> Subject: Re: [PATCH v5 2/4] perf: add arm64 smmuv3 pmu driver
>
> On Fri, Nov 30, 2018 at 03:47:49PM +, Shameer Kolothum wrote:
> > From: Neil Leeder
> >
> > Adds a new driver to support the SMMUv3 PMU and add it into the
> > perf events f
On Fri, Nov 30, 2018 at 03:47:49PM +, Shameer Kolothum wrote:
> From: Neil Leeder
>
> Adds a new driver to support the SMMUv3 PMU and add it into the
> perf events framework.
>
> Each SMMU node may have multiple PMUs associated with it, each of
> which may support different events.
>
>
From: Neil Leeder
Adds a new driver to support the SMMUv3 PMU and add it into the
perf events framework.
Each SMMU node may have multiple PMUs associated with it, each of
which may support different events.
SMMUv3 PMCG devices are named as smmuv3_pmcg_ where
is the physical page address of
From: Neil Leeder
Adds a new driver to support the SMMUv3 PMU and add it into the
perf events framework.
Each SMMU node may have multiple PMUs associated with it, each of
which may support different events.
SMMUv3 PMCG devices are named as smmuv3_pmcg_ where
is the physical page address of
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