>If you are interested in supporting SFPs as well, then using phylink
>makes sense, but you need to implement your phylink conversion properly,
>and that means supporting dynamic switching of the PHY interface mode,
>and allowing phylink to determine whether a PHY interface mode is
>supported or no
On Tue, Jun 25, 2019 at 09:38:37AM +, Parshuram Raju Thombare wrote:
>
> >> >In which case, gem_phylink_validate() must clear the support mask when
> >> >SGMII mode is requested to indicate that the interface mode is not
> >> >supported.
> >> >The same goes for _all_ other PHY link modes that
>> >In which case, gem_phylink_validate() must clear the support mask when
>> >SGMII mode is requested to indicate that the interface mode is not
>> >supported.
>> >The same goes for _all_ other PHY link modes that the hardware does not
>> >actually support, such as PHY_INTERFACE_MODE_10GKR...
>>
On Tue, Jun 25, 2019 at 09:26:29AM +, Parshuram Raju Thombare wrote:
> >In which case, gem_phylink_validate() must clear the support mask when
> >SGMII mode is requested to indicate that the interface mode is not
> >supported.
> >The same goes for _all_ other PHY link modes that the hardware do
>> +if (change_interface) {
>> +bp->phy_interface = state->interface;
>> +gem_writel(bp, NCR, ~GEM_BIT(TWO_PT_FIVE_GIG) &
>> + gem_readl(bp, NCR));
>This could do with a comment, such as the one I gave in my example.
Sure. I will add a comment here.
On Mon, Jun 24, 2019 at 01:11:14PM +0100, Parshuram Thombare wrote:
> This patch add support for SGMII interface) and
> 2.5Gbps MAC in Cadence ethernet controller driver.
>
> Signed-off-by: Parshuram Thombare
> ---
> drivers/net/ethernet/cadence/macb.h | 54 +-
> drivers/net
This patch add support for SGMII interface) and
2.5Gbps MAC in Cadence ethernet controller driver.
Signed-off-by: Parshuram Thombare
---
drivers/net/ethernet/cadence/macb.h | 54 +-
drivers/net/ethernet/cadence/macb_main.c | 72 ++--
2 files changed, 109
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