Re: [PATCH v5 3/3] i2c-ocores: sifive: add polling mode workaround for FU540-C000 SoC.

2019-05-21 Thread Sagar Kadam
Thanks Andreas, Yes, I rebased to v5.2-rc1 and observed that there have been changes in polling interface, and i2c->flags is not longer being used for setting the polling mode. I am working on a way to hook in the fix for broken IRQ and will submit it in v6. Thanks & BR, Sagar Kadam On Tue, May 2

Re: [PATCH v5 3/3] i2c-ocores: sifive: add polling mode workaround for FU540-C000 SoC.

2019-05-21 Thread Andreas Schwab
On Mai 20 2019, Sagar Shrikant Kadam wrote: > The i2c-ocore driver already has a polling mode interface.But it needs > a workaround for FU540 Chipset on HiFive unleashed board (RevA00). > There is an erratum in FU540 chip that prevents interrupt driven i2c > transfers from working, and also the I

Re: [PATCH v5 3/3] i2c-ocores: sifive: add polling mode workaround for FU540-C000 SoC.

2019-05-20 Thread Sagar Kadam
On Mon, May 20, 2019 at 8:22 PM Andrew Lunn wrote: > > On Mon, May 20, 2019 at 07:41:18PM +0530, Sagar Shrikant Kadam wrote: > > The i2c-ocore driver already has a polling mode interface.But it needs > > a workaround for FU540 Chipset on HiFive unleashed board (RevA00). > > There is an erratum in

Re: [PATCH v5 3/3] i2c-ocores: sifive: add polling mode workaround for FU540-C000 SoC.

2019-05-20 Thread Andrew Lunn
On Mon, May 20, 2019 at 07:41:18PM +0530, Sagar Shrikant Kadam wrote: > The i2c-ocore driver already has a polling mode interface.But it needs > a workaround for FU540 Chipset on HiFive unleashed board (RevA00). > There is an erratum in FU540 chip that prevents interrupt driven i2c > transfers from

[PATCH v5 3/3] i2c-ocores: sifive: add polling mode workaround for FU540-C000 SoC.

2019-05-20 Thread Sagar Shrikant Kadam
The i2c-ocore driver already has a polling mode interface.But it needs a workaround for FU540 Chipset on HiFive unleashed board (RevA00). There is an erratum in FU540 chip that prevents interrupt driven i2c transfers from working, and also the I2C controller's interrupt bit cannot be cleared if set