Hi Greg,
{sigh} why do hardware engineers ignore sane busses...
The next HW version is an integrated PCI endpoint, so there is hope.
Anyway, if you all are going to maintain this, no objection from me, it
should go through the irq tree.
OK, thanks. So this is getting quite late for 5.11,
On Wed, Dec 09, 2020 at 07:39:03PM +, Marc Zyngier wrote:
> On 2020-12-09 19:13, Greg KH wrote:
> > On Wed, Dec 09, 2020 at 07:04:02PM +, John Garry wrote:
> > > On 09/12/2020 18:32, Greg KH wrote:
> > > > On Wed, Dec 02, 2020 at 06:36:56PM +0800, John Garry wrote:
> > > > > Drivers for
On 09/12/2020 19:39, Marc Zyngier wrote:
Ok, I'd like to have the irq maintainers/developers ack this before
taking it in the driver core, as someone is going to have to maintain
this crazy thing for forever if it gets merged.
I'm actually quite happy with this, and as it turns out, the crazy
On 2020-12-09 19:13, Greg KH wrote:
On Wed, Dec 09, 2020 at 07:04:02PM +, John Garry wrote:
On 09/12/2020 18:32, Greg KH wrote:
> On Wed, Dec 02, 2020 at 06:36:56PM +0800, John Garry wrote:
> > Drivers for multi-queue platform devices may also want managed interrupts
> > for handling HW
On 09/12/2020 19:13, Greg KH wrote:
Hi Greg,
For this HW version, the device is on the system bus, directly addressable
by the CPU.
What do you mean by "system bus"?
Maybe my terminology is wrong, the point is that we have a platform
device driver.
Motivation is that I wanted to
On Wed, Dec 09, 2020 at 07:04:02PM +, John Garry wrote:
> On 09/12/2020 18:32, Greg KH wrote:
> > On Wed, Dec 02, 2020 at 06:36:56PM +0800, John Garry wrote:
> > > Drivers for multi-queue platform devices may also want managed interrupts
> > > for handling HW queue completion interrupts, so
On 09/12/2020 18:32, Greg KH wrote:
On Wed, Dec 02, 2020 at 06:36:56PM +0800, John Garry wrote:
Drivers for multi-queue platform devices may also want managed interrupts
for handling HW queue completion interrupts, so add support.
Hi Greg,
Why would a platform device want all of this?
On Wed, Dec 02, 2020 at 06:36:56PM +0800, John Garry wrote:
> Drivers for multi-queue platform devices may also want managed interrupts
> for handling HW queue completion interrupts, so add support.
Why would a platform device want all of this? Shouldn't such a device
be on a "real" bus instead?
Drivers for multi-queue platform devices may also want managed interrupts
for handling HW queue completion interrupts, so add support.
The function accepts an affinity descriptor pointer, which covers all IRQs
expected for the device.
The function is devm class as the only current in-tree user
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