Re: [PATCH v5 RESEND] perf: Support for Arm A32/T32 instruction sets in CoreSight trace

2018-12-03 Thread Arnaldo Carvalho de Melo
Em Mon, Dec 03, 2018 at 12:18:46PM +, Robert Walker escreveu: > This patch adds support for generating instruction samples from trace of > AArch32 programs using the A32 and T32 instruction sets. > > T32 has variable 2 or 4 byte instruction size, so the conversion between > addresses and instr

[PATCH v5 RESEND] perf: Support for Arm A32/T32 instruction sets in CoreSight trace

2018-12-03 Thread Robert Walker
This patch adds support for generating instruction samples from trace of AArch32 programs using the A32 and T32 instruction sets. T32 has variable 2 or 4 byte instruction size, so the conversion between addresses and instruction counts requires extra information from the trace decoder, requiring v