Re: [PATCH v6] mfd: intel-m10-bmc: add Intel MAX 10 BMC chip support for Intel FPGA PAC

2020-09-28 Thread Lee Jones
On Tue, 15 Sep 2020, Xu Yilun wrote: > This patch implements the basic functions of the BMC chip for some Intel > FPGA PCIe Acceleration Cards (PAC). The BMC is implemented using the > Intel MAX 10 CPLD. > > This BMC chip is connected to the FPGA by a SPI bus. To provide direct > register access

[PATCH v6] mfd: intel-m10-bmc: add Intel MAX 10 BMC chip support for Intel FPGA PAC

2020-09-14 Thread Xu Yilun
This patch implements the basic functions of the BMC chip for some Intel FPGA PCIe Acceleration Cards (PAC). The BMC is implemented using the Intel MAX 10 CPLD. This BMC chip is connected to the FPGA by a SPI bus. To provide direct register access from the FPGA, the "SPI slave to Avalon Master Bri