Re: [PATCH v6 0/7] Unify CPU topology across ARM & RISC-V

2019-06-03 Thread Atish Patra
On 5/30/19 2:12 PM, Jeremy Linton wrote: Hi, On 5/29/19 4:13 PM, Atish Patra wrote: The cpu-map DT entry in ARM can describe the CPU topology in much better way compared to other existing approaches. RISC-V can easily adopt this binding to represent its own CPU topology. Thus, both cpu-map DT b

Re: [PATCH v6 0/7] Unify CPU topology across ARM & RISC-V

2019-05-30 Thread Jeremy Linton
Hi, On 5/29/19 4:13 PM, Atish Patra wrote: The cpu-map DT entry in ARM can describe the CPU topology in much better way compared to other existing approaches. RISC-V can easily adopt this binding to represent its own CPU topology. Thus, both cpu-map DT binding and topology parsing code can be mo

[PATCH v6 0/7] Unify CPU topology across ARM & RISC-V

2019-05-29 Thread Atish Patra
The cpu-map DT entry in ARM can describe the CPU topology in much better way compared to other existing approaches. RISC-V can easily adopt this binding to represent its own CPU topology. Thus, both cpu-map DT binding and topology parsing code can be moved to a common location so that RISC-V or any