On Wednesday 31 January 2018 12:16 AM, David Lechner wrote:
> On 01/30/2018 08:50 AM, Rob Herring wrote:
>> On Mon, Jan 29, 2018 at 3:14 PM, David Lechner
>> wrote:
>>> On 01/29/2018 01:53 PM, Rob Herring wrote:
On Sat, Jan 20, 2018 at 11:13:40AM -0600, David Lechner wrote:
>
> T
On 01/30/2018 08:50 AM, Rob Herring wrote:
On Mon, Jan 29, 2018 at 3:14 PM, David Lechner wrote:
On 01/29/2018 01:53 PM, Rob Herring wrote:
On Sat, Jan 20, 2018 at 11:13:40AM -0600, David Lechner wrote:
This adds a new binding for the PLL IP blocks in the mach-davinci
family of processors.
On Mon, Jan 29, 2018 at 3:14 PM, David Lechner wrote:
> On 01/29/2018 01:53 PM, Rob Herring wrote:
>>
>> On Sat, Jan 20, 2018 at 11:13:40AM -0600, David Lechner wrote:
>>>
>>> This adds a new binding for the PLL IP blocks in the mach-davinci
>>> family of processors. Currently, only da850 has devi
On 01/29/2018 01:53 PM, Rob Herring wrote:
On Sat, Jan 20, 2018 at 11:13:40AM -0600, David Lechner wrote:
This adds a new binding for the PLL IP blocks in the mach-davinci
family of processors. Currently, only da850 has device tree support
but these bindings can also work for other SoCs in this
On Sat, Jan 20, 2018 at 11:13:40AM -0600, David Lechner wrote:
> This adds a new binding for the PLL IP blocks in the mach-davinci
> family of processors. Currently, only da850 has device tree support
> but these bindings can also work for other SoCs in this family just
> by adding new compatible s
This adds a new binding for the PLL IP blocks in the mach-davinci
family of processors. Currently, only da850 has device tree support
but these bindings can also work for other SoCs in this family just
by adding new compatible strings.
Note: Although these PLL controllers are very similar to the T
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