Re: [PATCH v6 02/10] clk: samsung: add new clocks for DMC for Exynos5422 SoC

Hi Chanwoo, On 4/30/19 3:31 AM, Chanwoo Choi wrote: > Hi Lukasz, > > I have no objection about this patch. > Instead, as I commented on v4, in order to reduce the confusion > about multiple clock definitions with same bit range of DIV_CDREX0, > > You need to add the additional comment and you

Re: [PATCH v6 02/10] clk: samsung: add new clocks for DMC for Exynos5422 SoC

Hi Lukasz, I have no objection about this patch. Instead, as I commented on v4, in order to reduce the confusion about multiple clock definitions with same bit range of DIV_CDREX0, You need to add the additional comment and you better to define the three clocks at the nearby in this driver.

[PATCH v6 02/10] clk: samsung: add new clocks for DMC for Exynos5422 SoC

This patch provides support for clocks needed for Dynamic Memory Controller in Exynos5422 SoC. It adds CDREX base register addresses, new DIV, MUX and GATE entries. Signed-off-by: Lukasz Luba --- drivers/clk/samsung/clk-exynos5420.c | 46 1 file changed, 42