Re: [PATCH v6 10/11] clk: at91: clk-master: re-factor master clock

2020-12-19 Thread Stephen Boyd
Quoting Claudiu Beznea (2020-11-19 07:43:16) > Re-factor master clock driver by splitting it into 2 clocks: prescaller > and divider clocks. Based on registered clock flags the prescaler's rate > could be changed at runtime. This is necessary for platforms supporting > DVFS (e.g. SAMA7G5) where mas

[PATCH v6 10/11] clk: at91: clk-master: re-factor master clock

2020-11-19 Thread Claudiu Beznea
Re-factor master clock driver by splitting it into 2 clocks: prescaller and divider clocks. Based on registered clock flags the prescaler's rate could be changed at runtime. This is necessary for platforms supporting DVFS (e.g. SAMA7G5) where master clock could be changed at run-time. Signed-off-b