Re: [PATCH v6 13/13] spi: atmel-quadspi: add support for sam9x60 qspi controller

2019-02-05 Thread Boris Brezillon
On Tue, 5 Feb 2019 17:33:38 + wrote: > From: Tudor Ambarus > > The sam9x60 qspi controller uses 2 clocks, one for the peripheral register > access, the other for the qspi core and phy. Both are mandatory. It uses > different transfer type bits in IFR register. It has dedicated registers > t

[PATCH v6 13/13] spi: atmel-quadspi: add support for sam9x60 qspi controller

2019-02-05 Thread Tudor.Ambarus
From: Tudor Ambarus The sam9x60 qspi controller uses 2 clocks, one for the peripheral register access, the other for the qspi core and phy. Both are mandatory. It uses different transfer type bits in IFR register. It has dedicated registers to specify a read or a write instruction: Read Instructi