[PATCH v6 13/15] scsi: ufs: add missing memory barriers

2015-10-28 Thread Yaniv Gardi
Performing several writes to UFS host controller registers has no guarantee of ordering, so we must make sure register writes to setup request list base address etc. are performed before the run/stop register is enabled. In addition, when setting up a task request, we must make sure the updating

[PATCH v6 13/15] scsi: ufs: add missing memory barriers

2015-10-28 Thread Yaniv Gardi
Performing several writes to UFS host controller registers has no guarantee of ordering, so we must make sure register writes to setup request list base address etc. are performed before the run/stop register is enabled. In addition, when setting up a task request, we must make sure the updating