Hi,
On 06/12/2018 03:10 AM, Wu Hao wrote:
>
> diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
> index a0aa163..e3b140e 100644
> --- a/drivers/fpga/Kconfig
> +++ b/drivers/fpga/Kconfig
> @@ -174,6 +174,15 @@ config FPGA_DFL_FME_REGION
> help
> Say Y to enable FPGA Region dri
On DFL FPGA devices, the Accelerated Function Unit (AFU), can be
reprogrammed for different functions. It connects to the FPGA
infrastructure (static FPGA region) via a Port. Port CSRs are
implemented separately from the AFU CSRs to provide control and
status of the Port. Once valid PR bitstream is
2 matches
Mail list logo