Re: [PATCH v6 6/6] bnxt_en: Eliminate duplicate barriers on weakly-ordered archs

2018-03-23 Thread Sinan Kaya
On 3/23/2018 6:36 PM, Michael Chan wrote: >> + mmiowb(); > Sorry for the late review. mmiowb() is not required here because we > are in NAPI context, so only one CPU will be updating this doorbell. > > Other than that, it looks good. > OK, I'll fix this on the next version. --

Re: [PATCH v6 6/6] bnxt_en: Eliminate duplicate barriers on weakly-ordered archs

2018-03-23 Thread Sinan Kaya
On 3/23/2018 6:36 PM, Michael Chan wrote: >> + mmiowb(); > Sorry for the late review. mmiowb() is not required here because we > are in NAPI context, so only one CPU will be updating this doorbell. > > Other than that, it looks good. > OK, I'll fix this on the next version. --

Re: [PATCH v6 6/6] bnxt_en: Eliminate duplicate barriers on weakly-ordered archs

2018-03-23 Thread Michael Chan
On Fri, Mar 23, 2018 at 3:23 PM, Sinan Kaya wrote: > Code includes wmb() followed by writel(). writel() already has a barrier on > some architectures like arm64. > > This ends up CPU observing two barriers back to back before executing the > register write. > > Create a new

Re: [PATCH v6 6/6] bnxt_en: Eliminate duplicate barriers on weakly-ordered archs

2018-03-23 Thread Michael Chan
On Fri, Mar 23, 2018 at 3:23 PM, Sinan Kaya wrote: > Code includes wmb() followed by writel(). writel() already has a barrier on > some architectures like arm64. > > This ends up CPU observing two barriers back to back before executing the > register write. > > Create a new wrapper function with

[PATCH v6 6/6] bnxt_en: Eliminate duplicate barriers on weakly-ordered archs

2018-03-23 Thread Sinan Kaya
Code includes wmb() followed by writel(). writel() already has a barrier on some architectures like arm64. This ends up CPU observing two barriers back to back before executing the register write. Create a new wrapper function with relaxed write operator. Use the new wrapper when a write is

[PATCH v6 6/6] bnxt_en: Eliminate duplicate barriers on weakly-ordered archs

2018-03-23 Thread Sinan Kaya
Code includes wmb() followed by writel(). writel() already has a barrier on some architectures like arm64. This ends up CPU observing two barriers back to back before executing the register write. Create a new wrapper function with relaxed write operator. Use the new wrapper when a write is