On 12/11/2014 12:32 PM, David Miller wrote:
> From: Alexander Duyck
> Date: Wed, 10 Dec 2014 21:28:39 -0800
>
>> It occurs to me that I never got a sign off from any of the maintainers
>> on getting this pulled in.
>>
>> Since the merge window is open I was wondering which tree I should make
>> su
On Thu, Dec 11, 2014 at 12:32 PM, David Miller wrote:
>
> I have no problem taking this via my tree, but I want to see agreement
> from other interested parties.
Since the early users are network drivers, and since it's otherwise
cross-architecture and not clear under any other maintainership, th
l...@linux.vnet.ibm.com; nic_s...@realtek.com;
> will.dea...@arm.com; mich...@ellerman.id.au; Luck, Tony; torvalds@linux-
> foundation.org; o...@redhat.com; schwidef...@de.ibm.com;
> fweis...@gmail.com
> Subject: Re: [PATCH v7 0/4] arch: Add lightweight memory barriers for
> coherent memory
From: Alexander Duyck
Date: Wed, 10 Dec 2014 21:28:39 -0800
> It occurs to me that I never got a sign off from any of the maintainers
> on getting this pulled in.
>
> Since the merge window is open I was wondering which tree I should make
> sure these patches apply to and who will be the one to
On 11/25/2014 12:35 PM, Alexander Duyck wrote:
> These patches introduce two new primitives for synchronizing cache coherent
> memory writes and reads. These two new primitives are:
>
> dma_rmb()
> dma_wmb()
>
> The first patch cleans up some unnecessary overhead related to the
> def
These patches introduce two new primitives for synchronizing cache coherent
memory writes and reads. These two new primitives are:
dma_rmb()
dma_wmb()
The first patch cleans up some unnecessary overhead related to the
definition of read_barrier_depends, smp_read_barrier_depends,
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