Re: [PATCH v7 03/14] PCI: cadence: Convert all r/w accessors to perform only 32-bit accesses

2020-07-21 Thread Kishon Vijay Abraham I
Hi Lorenzo, On 7/21/2020 9:19 PM, Lorenzo Pieralisi wrote: > On Mon, Jul 13, 2020 at 04:31:30PM +0530, Kishon Vijay Abraham I wrote: >> Certain platforms like TI's J721E using Cadence PCIe IP can perform only >> 32-bit accesses for reading or writing to Cadence registers. Convert all >> read and w

Re: [PATCH v7 03/14] PCI: cadence: Convert all r/w accessors to perform only 32-bit accesses

2020-07-21 Thread Lorenzo Pieralisi
On Mon, Jul 13, 2020 at 04:31:30PM +0530, Kishon Vijay Abraham I wrote: > Certain platforms like TI's J721E using Cadence PCIe IP can perform only > 32-bit accesses for reading or writing to Cadence registers. Convert all > read and write accesses to 32-bit in Cadence PCIe driver in preparation > f

[PATCH v7 03/14] PCI: cadence: Convert all r/w accessors to perform only 32-bit accesses

2020-07-13 Thread Kishon Vijay Abraham I
Certain platforms like TI's J721E using Cadence PCIe IP can perform only 32-bit accesses for reading or writing to Cadence registers. Convert all read and write accesses to 32-bit in Cadence PCIe driver in preparation for adding PCIe support in TI's J721E SoC. Also add spin lock to disable interru