Re: [PATCH v7 07/11] powerpc/powernv: Add platform support for stop instruction

2016-07-07 Thread Michael Neuling
> > > > > > @@ -439,7 +540,18 @@ timebase_resync: > > >    */ > > >   bne cr4,clear_lock > > >   > > > - /* Restore per core state */ > > > + /* > > > +  * First thread in the core to wake up and its waking up > > > with > > > +  * complete hypervisor state loss. Restore per core > > > hyperv

Re: [PATCH v7 07/11] powerpc/powernv: Add platform support for stop instruction

2016-07-07 Thread Shreyas B Prabhu
On 07/08/2016 07:50 AM, Michael Neuling wrote: > >> diff --git a/arch/powerpc/include/asm/cpuidle.h >> b/arch/powerpc/include/asm/cpuidle.h >> index d2f99ca..3d7fc06 100644 >> --- a/arch/powerpc/include/asm/cpuidle.h >> +++ b/arch/powerpc/include/asm/cpuidle.h >> @@ -13,6 +13,8 @@ >> #ifndef _

Re: [PATCH v7 07/11] powerpc/powernv: Add platform support for stop instruction

2016-07-07 Thread Michael Neuling
> diff --git a/arch/powerpc/include/asm/cpuidle.h > b/arch/powerpc/include/asm/cpuidle.h > index d2f99ca..3d7fc06 100644 > --- a/arch/powerpc/include/asm/cpuidle.h > +++ b/arch/powerpc/include/asm/cpuidle.h > @@ -13,6 +13,8 @@ >  #ifndef __ASSEMBLY__ >  extern u32 pnv_fastsleep_workaround_at_entr

[PATCH v7 07/11] powerpc/powernv: Add platform support for stop instruction

2016-07-07 Thread Shreyas B. Prabhu
POWER ISA v3 defines a new idle processor core mechanism. In summary, a) new instruction named stop is added. This instruction replaces instructions like nap, sleep, rvwinkle. b) new per thread SPR named Processor Stop Status and Control Register (PSSCR) is added which controls th