On Thu, Jan 08, 2015 at 03:22:10PM +0200, Mikko Perttunen wrote:
> From: Tuomas Tynkkynen
>
> Save and restore this register since the LP1 restore assembly routines
> fiddle with it. Otherwise the CPU would keep running on PLLX after
> resume from suspend even when DFLL was the original
On Thu, Jan 08, 2015 at 03:22:10PM +0200, Mikko Perttunen wrote:
From: Tuomas Tynkkynen ttynkky...@nvidia.com
Save and restore this register since the LP1 restore assembly routines
fiddle with it. Otherwise the CPU would keep running on PLLX after
resume from suspend even when DFLL was the
From: Tuomas Tynkkynen
Save and restore this register since the LP1 restore assembly routines
fiddle with it. Otherwise the CPU would keep running on PLLX after
resume from suspend even when DFLL was the original clocksource.
Signed-off-by: Tuomas Tynkkynen
Signed-off-by: Mikko Perttunen
---
From: Tuomas Tynkkynen ttynkky...@nvidia.com
Save and restore this register since the LP1 restore assembly routines
fiddle with it. Otherwise the CPU would keep running on PLLX after
resume from suspend even when DFLL was the original clocksource.
Signed-off-by: Tuomas Tynkkynen
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