On Sat, Feb 16, 2013 at 3:45 AM, Benjamin Herrenschmidt
wrote:
> On Fri, 2013-02-15 at 11:46 -0800, Sukadev Bhattiprolu wrote:
>>
>> POWER could use an additional field:
>>
>> mem_deratmiss:1
>
> If you want to make that field more "generic" make it "lvl1_tlb_miss",
> ie,
* Benjamin Herrenschmidt wrote:
> On Fri, 2013-02-15 at 11:46 -0800, Sukadev Bhattiprolu wrote:
> >
> > POWER could use an additional field:
> >
> > mem_deratmiss:1
>
> If you want to make that field more "generic" make it
> "lvl1_tlb_miss", ie, a miss in the
* Benjamin Herrenschmidt b...@kernel.crashing.org wrote:
On Fri, 2013-02-15 at 11:46 -0800, Sukadev Bhattiprolu wrote:
POWER could use an additional field:
mem_deratmiss:1
If you want to make that field more generic make it
lvl1_tlb_miss, ie, a miss in the
On Sat, Feb 16, 2013 at 3:45 AM, Benjamin Herrenschmidt
b...@kernel.crashing.org wrote:
On Fri, 2013-02-15 at 11:46 -0800, Sukadev Bhattiprolu wrote:
POWER could use an additional field:
mem_deratmiss:1
If you want to make that field more generic make it
On Fri, 2013-02-15 at 11:46 -0800, Sukadev Bhattiprolu wrote:
>
> POWER could use an additional field:
>
> mem_deratmiss:1
If you want to make that field more "generic" make it "lvl1_tlb_miss",
ie, a miss in the internal "level 1" TLB which is the smallest/fastest
TLB
>
> * Stephane Eranian wrote:
>
> > This patch adds PERF_SAMPLE_DSRC.
> >
> > PERF_SAMPLE_DSRC collects the data source, i.e., where
> > did the data associated with the sampled instruction
> > come from. Information is stored in a perf_mem_dsrc
> > structure. It contains opcode, mem level,
* Stephane Eranian eran...@google.com wrote:
This patch adds PERF_SAMPLE_DSRC.
PERF_SAMPLE_DSRC collects the data source, i.e., where
did the data associated with the sampled instruction
come from. Information is stored in a perf_mem_dsrc
structure. It contains opcode, mem level,
On Fri, 2013-02-15 at 11:46 -0800, Sukadev Bhattiprolu wrote:
POWER could use an additional field:
mem_deratmiss:1
If you want to make that field more generic make it lvl1_tlb_miss,
ie, a miss in the internal level 1 TLB which is the smallest/fastest
TLB level in the
On Fri, 2013-01-25 at 16:30 +0100, Stephane Eranian wrote:
> On Fri, Jan 25, 2013 at 10:01 AM, Ingo Molnar wrote:
> >
> > Would be nice to get feedback from PowerPC folks to see how well
> > this matches their memory profiling hw capabilities?
> >
> I agree, I tried to remain as generic as
On Fri, 2013-01-25 at 16:30 +0100, Stephane Eranian wrote:
On Fri, Jan 25, 2013 at 10:01 AM, Ingo Molnar mi...@kernel.org wrote:
Would be nice to get feedback from PowerPC folks to see how well
this matches their memory profiling hw capabilities?
I agree, I tried to remain as generic as
On Fri, Jan 25, 2013 at 10:01 AM, Ingo Molnar wrote:
>
> * Stephane Eranian wrote:
>
>> This patch adds PERF_SAMPLE_DSRC.
>>
>> PERF_SAMPLE_DSRC collects the data source, i.e., where
>> did the data associated with the sampled instruction
>> come from. Information is stored in a perf_mem_dsrc
>>
* Stephane Eranian wrote:
> This patch adds PERF_SAMPLE_DSRC.
>
> PERF_SAMPLE_DSRC collects the data source, i.e., where
> did the data associated with the sampled instruction
> come from. Information is stored in a perf_mem_dsrc
> structure. It contains opcode, mem level, tlb, snoop,
> lock
* Stephane Eranian eran...@google.com wrote:
This patch adds PERF_SAMPLE_DSRC.
PERF_SAMPLE_DSRC collects the data source, i.e., where
did the data associated with the sampled instruction
come from. Information is stored in a perf_mem_dsrc
structure. It contains opcode, mem level, tlb,
On Fri, Jan 25, 2013 at 10:01 AM, Ingo Molnar mi...@kernel.org wrote:
* Stephane Eranian eran...@google.com wrote:
This patch adds PERF_SAMPLE_DSRC.
PERF_SAMPLE_DSRC collects the data source, i.e., where
did the data associated with the sampled instruction
come from. Information is stored
This patch adds PERF_SAMPLE_DSRC.
PERF_SAMPLE_DSRC collects the data source, i.e., where
did the data associated with the sampled instruction
come from. Information is stored in a perf_mem_dsrc
structure. It contains opcode, mem level, tlb, snoop,
lock information, subject to availability in
This patch adds PERF_SAMPLE_DSRC.
PERF_SAMPLE_DSRC collects the data source, i.e., where
did the data associated with the sampled instruction
come from. Information is stored in a perf_mem_dsrc
structure. It contains opcode, mem level, tlb, snoop,
lock information, subject to availability in
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