On 12/02/2016 11:52 AM, Ricardo Ribalda Delgado wrote:
> Hi Marek
Hi,
> On Thu, Dec 1, 2016 at 7:11 PM, Marek Vasut wrote:
>> On 12/01/2016 06:52 PM, Ricardo Ribalda Delgado wrote:
>>> Hi Marek
>>
>> Hi,
>>
>>> Thanks for your review
>>>
>>> On Thu, Dec 1, 2016 at 5:05 PM, Marek Vasut wrote:
>>
Hi Marek
On Thu, Dec 1, 2016 at 7:11 PM, Marek Vasut wrote:
> On 12/01/2016 06:52 PM, Ricardo Ribalda Delgado wrote:
>> Hi Marek
>
> Hi,
>
>> Thanks for your review
>>
>> On Thu, Dec 1, 2016 at 5:05 PM, Marek Vasut wrote:
>>>
>>> On 11/24/2016 05:56 PM, Ricardo Ribalda Delgado wrote:
>>
+#d
On 12/01/2016 06:52 PM, Ricardo Ribalda Delgado wrote:
> Hi Marek
Hi,
> Thanks for your review
>
> On Thu, Dec 1, 2016 at 5:05 PM, Marek Vasut wrote:
>>
>> On 11/24/2016 05:56 PM, Ricardo Ribalda Delgado wrote:
>
>>> +#define SPI_S3ANBIT(10) /*
>>> +
Hi Marek
Thanks for your review
On Thu, Dec 1, 2016 at 5:05 PM, Marek Vasut wrote:
>
> On 11/24/2016 05:56 PM, Ricardo Ribalda Delgado wrote:
>> +#define SPI_S3ANBIT(10) /*
>> + * Xilinx Spartan 3AN In-System Flash
>> +
On 11/24/2016 05:56 PM, Ricardo Ribalda Delgado wrote:
> Xilinx Spartan-3AN FPGAs contain an In-System Flash where they keep
> their configuration data and (optionally) some user data.
>
> The protocol of this flash follows most of the spi-nor standard. With
> the following differences:
>
> - Pag
Xilinx Spartan-3AN FPGAs contain an In-System Flash where they keep
their configuration data and (optionally) some user data.
The protocol of this flash follows most of the spi-nor standard. With
the following differences:
- Page size might not be a power of two.
- The address calculation (defaul
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