On 7/22/19 12:25 PM, Paul Walmsley wrote:
On Fri, 12 Jul 2019, Paul Walmsley wrote:
On Thu, 27 Jun 2019, Atish Patra wrote:
The cpu-map DT entry in ARM can describe the CPU topology in much better
way compared to other existing approaches. RISC-V can easily adopt this
binding to represent
On Fri, 12 Jul 2019, Paul Walmsley wrote:
> On Thu, 27 Jun 2019, Atish Patra wrote:
>
> > The cpu-map DT entry in ARM can describe the CPU topology in much better
> > way compared to other existing approaches. RISC-V can easily adopt this
> > binding to represent its own CPU topology. Thus, both
Folks,
On Thu, 27 Jun 2019, Atish Patra wrote:
> The cpu-map DT entry in ARM can describe the CPU topology in much better
> way compared to other existing approaches. RISC-V can easily adopt this
> binding to represent its own CPU topology. Thus, both cpu-map DT
> binding and topology parsing
On Mon, 2019-07-01 at 11:55 -0700, Paul Walmsley wrote:
> On Mon, 1 Jul 2019, Atish Patra wrote:
>
> > On Mon, 2019-07-01 at 11:44 -0700, Paul Walmsley wrote:
> > > Looks like patches 1, 6, and 7 are missing your Signed-off-
> > > by:. Can I
> > > add those?
> > >
> > Sure.
> >
> > Is it a
On Mon, 1 Jul 2019, Atish Patra wrote:
> On Mon, 2019-07-01 at 11:44 -0700, Paul Walmsley wrote:
> >
> > Looks like patches 1, 6, and 7 are missing your Signed-off-by:. Can I
> > add those?
> >
> Sure.
>
> Is it a common practice to add "Signed-off-by:" the sender even if the
> sender has
On Mon, 2019-07-01 at 11:44 -0700, Paul Walmsley wrote:
> Hi Atish
>
> Looks like patches 1, 6, and 7 are missing your Signed-off-by:. Can
> I add
> those?
>
Sure.
Is it a common practice to add "Signed-off-by:" the sender even if the
sender has not touched the patch at all?
Regards,
Atish
Hi Atish
Looks like patches 1, 6, and 7 are missing your Signed-off-by:. Can I add
those?
- Paul
The cpu-map DT entry in ARM can describe the CPU topology in much better
way compared to other existing approaches. RISC-V can easily adopt this
binding to represent its own CPU topology. Thus, both cpu-map DT
binding and topology parsing code can be moved to a common location so
that RISC-V or
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