Re: [PATCH v8 03/13] clk: samsung: add BPLL rate table for Exynos 5422 SoC

On Wed, 5 Jun 2019 at 18:54, Lukasz Luba wrote: > > Add new table rate for BPLL for Exynos5422 SoC supporting Dynamic Memory > Controller frequencies for driver's DRAM timings. > > Acked-by: Chanwoo Choi > Signed-off-by: Lukasz Luba > --- > drivers/clk/samsung/clk-exynos5420.c | 17

[PATCH v8 03/13] clk: samsung: add BPLL rate table for Exynos 5422 SoC

Add new table rate for BPLL for Exynos5422 SoC supporting Dynamic Memory Controller frequencies for driver's DRAM timings. Acked-by: Chanwoo Choi Signed-off-by: Lukasz Luba --- drivers/clk/samsung/clk-exynos5420.c | 17 - 1 file changed, 16 insertions(+), 1 deletion(-) diff --g