Re: [PATCH v8 1/1] fpga: dfl: afu: harden port enable logic

2021-03-23 Thread Russ Weight
On 3/2/21 5:45 PM, Russ Weight wrote: > Port enable is not complete until ACK = 0. Change > __afu_port_enable() to guarantee that the enable process > is complete by polling for ACK == 0. > > Signed-off-by: Russ Weight > Reviewed-by: Tom Rix > Reviewed-by: Matthew Gerlach > Acked-by: Wu Hao

[PATCH v8 1/1] fpga: dfl: afu: harden port enable logic

2021-03-03 Thread Russ Weight
Port enable is not complete until ACK = 0. Change __afu_port_enable() to guarantee that the enable process is complete by polling for ACK == 0. Signed-off-by: Russ Weight Reviewed-by: Tom Rix Reviewed-by: Matthew Gerlach Acked-by: Wu Hao --- v8: - Rebased to 5.12-rc1 (there were no conflicts