Re: [PATCH v9 1/1] fpga: dfl: afu: harden port enable logic

On Tue, Mar 23, 2021 at 03:46:50PM -0700, Russ Weight wrote: > Port enable is not complete until ACK = 0. Change > __afu_port_enable() to guarantee that the enable process > is complete by polling for ACK == 0. > > Signed-off-by: Russ Weight > Reviewed-by: Tom Rix > Reviewed-by: Matthew Gerlach

[PATCH v9 1/1] fpga: dfl: afu: harden port enable logic

Port enable is not complete until ACK = 0. Change __afu_port_enable() to guarantee that the enable process is complete by polling for ACK == 0. Signed-off-by: Russ Weight Reviewed-by: Tom Rix Reviewed-by: Matthew Gerlach Acked-by: Wu Hao --- v9: - Fix the sense of the if condition in