Re: [PATCH v9 1/6] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

2016-11-10 Thread Darren Hart
On Tue, Nov 08, 2016 at 05:55:20PM +0100, Thomas Gleixner wrote: > On Tue, 8 Nov 2016, Tan Jui Nee wrote: > > There is already one and at least one more user coming which > > require an access to Primary to Sideband bridge (P2SB) in order > > to get IO or MMIO bar hidden by BIOS. > > Create a

Re: [PATCH v9 1/6] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

2016-11-10 Thread Darren Hart
On Tue, Nov 08, 2016 at 05:55:20PM +0100, Thomas Gleixner wrote: > On Tue, 8 Nov 2016, Tan Jui Nee wrote: > > There is already one and at least one more user coming which > > require an access to Primary to Sideband bridge (P2SB) in order > > to get IO or MMIO bar hidden by BIOS. > > Create a

Re: [PATCH v9 1/6] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

2016-11-08 Thread Thomas Gleixner
On Tue, 8 Nov 2016, Tan Jui Nee wrote: > There is already one and at least one more user coming which > require an access to Primary to Sideband bridge (P2SB) in order > to get IO or MMIO bar hidden by BIOS. > Create a driver to access P2SB for x86 devices. > > arch/x86/Kconfig |

Re: [PATCH v9 1/6] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

2016-11-08 Thread Thomas Gleixner
On Tue, 8 Nov 2016, Tan Jui Nee wrote: > There is already one and at least one more user coming which > require an access to Primary to Sideband bridge (P2SB) in order > to get IO or MMIO bar hidden by BIOS. > Create a driver to access P2SB for x86 devices. > > arch/x86/Kconfig |

Re: [PATCH v9 1/6] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

2016-11-08 Thread Mika Westerberg
On Tue, Nov 08, 2016 at 04:57:18PM +0800, Tan Jui Nee wrote: > From: Andy Shevchenko > > There is already one and at least one more user coming which > require an access to Primary to Sideband bridge (P2SB) in order > to get IO or MMIO bar hidden by BIOS. >

Re: [PATCH v9 1/6] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

2016-11-08 Thread Mika Westerberg
On Tue, Nov 08, 2016 at 04:57:18PM +0800, Tan Jui Nee wrote: > From: Andy Shevchenko > > There is already one and at least one more user coming which > require an access to Primary to Sideband bridge (P2SB) in order > to get IO or MMIO bar hidden by BIOS. > Create a driver to access P2SB for x86

[PATCH v9 1/6] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

2016-11-08 Thread Tan Jui Nee
From: Andy Shevchenko There is already one and at least one more user coming which require an access to Primary to Sideband bridge (P2SB) in order to get IO or MMIO bar hidden by BIOS. Create a driver to access P2SB for x86 devices. Signed-off-by: Yong,

[PATCH v9 1/6] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

2016-11-08 Thread Tan Jui Nee
From: Andy Shevchenko There is already one and at least one more user coming which require an access to Primary to Sideband bridge (P2SB) in order to get IO or MMIO bar hidden by BIOS. Create a driver to access P2SB for x86 devices. Signed-off-by: Yong, Jonathan Signed-off-by: Andy Shevchenko