>> + i2c_ic->irq_domain = irq_domain_add_linear(
>> + node, ASPEED_I2C_IC_NUM_BUS,
>> + _i2c_ic_irq_domain_ops, NULL);
>
> nit: can you have at least one argument following the function name?
> Even if checkpatch shouts out you?
Makes no difference to
>> + i2c_ic->irq_domain = irq_domain_add_linear(
>> + node, ASPEED_I2C_IC_NUM_BUS,
>> + _i2c_ic_irq_domain_ops, NULL);
>
> nit: can you have at least one argument following the function name?
> Even if checkpatch shouts out you?
Makes no difference to
On 02/06/17 09:46, Brendan Higgins wrote:
> The Aspeed 24XX/25XX chips share a single hardware interrupt across 14
> separate I2C busses. This adds a dummy irqchip which maps the single
> hardware interrupt to software interrupts for each of the busses.
>
> Signed-off-by: Brendan Higgins
On 02/06/17 09:46, Brendan Higgins wrote:
> The Aspeed 24XX/25XX chips share a single hardware interrupt across 14
> separate I2C busses. This adds a dummy irqchip which maps the single
> hardware interrupt to software interrupts for each of the busses.
>
> Signed-off-by: Brendan Higgins
> ---
>
The Aspeed 24XX/25XX chips share a single hardware interrupt across 14
separate I2C busses. This adds a dummy irqchip which maps the single
hardware interrupt to software interrupts for each of the busses.
Signed-off-by: Brendan Higgins
---
Added in v6:
- Pulled
The Aspeed 24XX/25XX chips share a single hardware interrupt across 14
separate I2C busses. This adds a dummy irqchip which maps the single
hardware interrupt to software interrupts for each of the busses.
Signed-off-by: Brendan Higgins
---
Added in v6:
- Pulled "aspeed_i2c_controller" out
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