On system with several pcie switches, BIOS allocate very tight resources
to the bridge bar, and it is not aligned to min_align as kernel allocation
code.
For example:
02:03.0---0c:00.0---0d:04.0---18:00.0
18:00.0 need 0x1000, and 0x0001.
BIOS only allocate 0x1010 to 0d:04.0 and
On system with several pcie switches, BIOS allocate very tight resources
to the bridge bar, and it is not aligned to min_align as kernel allocation
code.
For example:
02:03.0---0c:00.0---0d:04.0---18:00.0
18:00.0 need 0x1000, and 0x0001.
BIOS only allocate 0x1010 to 0d:04.0 and
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