On Fri, 2019-07-26 at 15:51 +0100, James Morse wrote:
> Hi Chris,
>
> On 12/07/2019 04:49, Chris Packham wrote:
> >
> > The Armada 38x and other integrated SoCs use a reduced pin count so
> > the
> > width of the SDRAM interface is smaller than the Armada XP SoCs.
> > This
> > means that the
Hi Chris,
On 12/07/2019 04:49, Chris Packham wrote:
> The Armada 38x and other integrated SoCs use a reduced pin count so the
> width of the SDRAM interface is smaller than the Armada XP SoCs. This
> means that the definition of "full" and "half" width is reduced from
> 64/32 to 32/16.
> diff
The Armada 38x and other integrated SoCs use a reduced pin count so the
width of the SDRAM interface is smaller than the Armada XP SoCs. This
means that the definition of "full" and "half" width is reduced from
64/32 to 32/16.
Signed-off-by: Chris Packham
---
drivers/edac/armada_xp_edac.c | 5
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