Re: [PATCHv6 1/3] devicetree: Addition of the Altera SDRAM controller

2014-06-22 Thread Steffen Trumtrar
On Sun, Jun 22, 2014 at 01:31:02PM -0500, Thor Thayer wrote: > On Sat, Jun 21, 2014 at 4:04 AM, Steffen Trumtrar > wrote: > > Hi! > > > > On Fri, Jun 20, 2014 at 06:22:01PM -0500, ttha...@altera.com wrote: > >> From: Thor Thayer > >> > >> Addition of the Altera SDRAM Controller bindings and devic

Re: [PATCHv6 1/3] devicetree: Addition of the Altera SDRAM controller

2014-06-22 Thread Thor Thayer
On Sat, Jun 21, 2014 at 4:04 AM, Steffen Trumtrar wrote: > Hi! > > On Fri, Jun 20, 2014 at 06:22:01PM -0500, ttha...@altera.com wrote: >> From: Thor Thayer >> >> Addition of the Altera SDRAM Controller bindings and device tree changes. >> >> v2: Changes to SoC SDRAM EDAC code. >> >> v3: Implement

Re: [PATCHv6 1/3] devicetree: Addition of the Altera SDRAM controller

2014-06-21 Thread Steffen Trumtrar
Hi! On Fri, Jun 20, 2014 at 06:22:01PM -0500, ttha...@altera.com wrote: > From: Thor Thayer > > Addition of the Altera SDRAM Controller bindings and device tree changes. > > v2: Changes to SoC SDRAM EDAC code. > > v3: Implement code suggestions for SDRAM EDAC code. > > v4: Remove syscon from

[PATCHv6 1/3] devicetree: Addition of the Altera SDRAM controller

2014-06-20 Thread tthayer
From: Thor Thayer Addition of the Altera SDRAM Controller bindings and device tree changes. v2: Changes to SoC SDRAM EDAC code. v3: Implement code suggestions for SDRAM EDAC code. v4: Remove syscon from SDRAM controller bindings. v5: No Change, bump version for consistency. v6: Only map the

[PATCHv6 1/3] devicetree: Addition of the Altera SDRAM controller

2014-06-20 Thread tthayer
From: Thor Thayer v2: Changes to SoC SDRAM EDAC code. v3: Implement code suggestions for SDRAM EDAC code. v4: Remove syscon from SDRAM controller bindings. v5: No Change, bump version for consistency. v6: Only map the ctrlcfg register as syscon. Signed-off-by: Thor Thayer --- .../bindings/