On 20.11.2015 11:18, Lorenzo Pieralisi wrote:
Hi Jiang,
On Sat, Nov 14, 2015 at 01:49:08AM +0800, Jiang Liu wrote:
[...]
Not really. My concern is that there might be platforms out there with
an offset between the CPU and PCI physical address spaces, and if we
remove the offset value in acpi_
On 11/6/2015 10:44 AM, Jiang Liu wrote:
> On 2015/11/6 23:32, Jiang Liu wrote:
>> On 2015/11/6 22:45, Lorenzo Pieralisi wrote:
>>> On Fri, Nov 06, 2015 at 09:22:46PM +0800, Jiang Liu wrote:
On 2015/11/6 20:40, Tomasz Nowicki wrote:
> On 06.11.2015 12:46, Jiang Liu wrote:
>> On 2015/11/
Hi Jiang,
On Sat, Nov 14, 2015 at 01:49:08AM +0800, Jiang Liu wrote:
[...]
> > Not really. My concern is that there might be platforms out there with
> > an offset between the CPU and PCI physical address spaces, and if we
> > remove the offset value in acpi_decode_space we can break them,
> > b
On 2015/11/14 1:03, Lorenzo Pieralisi wrote:
> Please trim your emails, thanks.
>
> On Fri, Nov 13, 2015 at 01:57:30PM +0100, Tomasz Nowicki wrote:
>> On 12.11.2015 16:05, Jiang Liu wrote:
>
> [...]
>
> IA64 actually ignores the translation type flag and just assume it's
> TypeTranslatio
Please trim your emails, thanks.
On Fri, Nov 13, 2015 at 01:57:30PM +0100, Tomasz Nowicki wrote:
> On 12.11.2015 16:05, Jiang Liu wrote:
[...]
> >>>IA64 actually ignores the translation type flag and just assume it's
> >>>TypeTranslation, so there may be some IA64 BIOS implementations
> >>>accid
On 12.11.2015 16:05, Jiang Liu wrote:
On 2015/11/12 22:45, Tomasz Nowicki wrote:
On 12.11.2015 15:04, Jiang Liu wrote:
On 2015/11/12 21:21, Tomasz Nowicki wrote:
On 12.11.2015 09:43, Jiang Liu wrote:
On 2015/11/12 1:46, Lorenzo Pieralisi wrote:
On Tue, Nov 10, 2015 at 01:50:46PM +0800, Jiang
On 2015/11/12 22:45, Tomasz Nowicki wrote:
> On 12.11.2015 15:04, Jiang Liu wrote:
>> On 2015/11/12 21:21, Tomasz Nowicki wrote:
>>> On 12.11.2015 09:43, Jiang Liu wrote:
On 2015/11/12 1:46, Lorenzo Pieralisi wrote:
> On Tue, Nov 10, 2015 at 01:50:46PM +0800, Jiang Liu wrote:
>
> [
On 12.11.2015 15:04, Jiang Liu wrote:
On 2015/11/12 21:21, Tomasz Nowicki wrote:
On 12.11.2015 09:43, Jiang Liu wrote:
On 2015/11/12 1:46, Lorenzo Pieralisi wrote:
On Tue, Nov 10, 2015 at 01:50:46PM +0800, Jiang Liu wrote:
[...]
In particular, I would like to understand, for an eg DWordIO
d
On 2015/11/12 21:21, Tomasz Nowicki wrote:
> On 12.11.2015 09:43, Jiang Liu wrote:
>> On 2015/11/12 1:46, Lorenzo Pieralisi wrote:
>>> On Tue, Nov 10, 2015 at 01:50:46PM +0800, Jiang Liu wrote:
>>>
>>> [...]
>>>
>> In particular, I would like to understand, for an eg DWordIO
>> descriptor,
On 12.11.2015 09:43, Jiang Liu wrote:
On 2015/11/12 1:46, Lorenzo Pieralisi wrote:
On Tue, Nov 10, 2015 at 01:50:46PM +0800, Jiang Liu wrote:
[...]
In particular, I would like to understand, for an eg DWordIO descriptor,
what Range Minimum, Range Maximum and Translation Offset represent,
they
On Wed, Nov 11, 2015 at 09:55:37PM +0100, Arnd Bergmann wrote:
> On Wednesday 11 November 2015 17:46:47 Lorenzo Pieralisi wrote:
> > On Tue, Nov 10, 2015 at 01:50:46PM +0800, Jiang Liu wrote:
> > If we go with this approach though, you are not adding the offset to
> > the resource when parsing the
On 2015/11/12 1:46, Lorenzo Pieralisi wrote:
> On Tue, Nov 10, 2015 at 01:50:46PM +0800, Jiang Liu wrote:
>
> [...]
>
In particular, I would like to understand, for an eg DWordIO descriptor,
what Range Minimum, Range Maximum and Translation Offset represent,
they can't mean differe
On Wednesday 11 November 2015 17:46:47 Lorenzo Pieralisi wrote:
> On Tue, Nov 10, 2015 at 01:50:46PM +0800, Jiang Liu wrote:
> If we go with this approach though, you are not adding the offset to
> the resource when parsing the memory spaces in acpi_decode_space(), are we
> sure that's what we real
On Wed, Nov 11, 2015 at 05:46:47PM +, Lorenzo Pieralisi wrote:
> On Tue, Nov 10, 2015 at 01:50:46PM +0800, Jiang Liu wrote:
>
> [...]
>
> > >> In particular, I would like to understand, for an eg DWordIO descriptor,
> > >> what Range Minimum, Range Maximum and Translation Offset represent,
>
On Tue, Nov 10, 2015 at 01:50:46PM +0800, Jiang Liu wrote:
[...]
> >> In particular, I would like to understand, for an eg DWordIO descriptor,
> >> what Range Minimum, Range Maximum and Translation Offset represent,
> >> they can't mean different things depending on the SW parsing them,
> >> this
On 2015/11/10 4:09, Arnd Bergmann wrote:
> On Monday 09 November 2015 17:10:43 Lorenzo Pieralisi wrote:
>> On Mon, Nov 09, 2015 at 03:07:38PM +0100, Tomasz Nowicki wrote:
>>> On 06.11.2015 14:22, Jiang Liu wrote:
On 2015/11/6 20:40, Tomasz Nowicki wrote:
> On 06.11.2015 12:46, Jiang Liu wr
On Monday 09 November 2015 17:10:43 Lorenzo Pieralisi wrote:
> On Mon, Nov 09, 2015 at 03:07:38PM +0100, Tomasz Nowicki wrote:
> > On 06.11.2015 14:22, Jiang Liu wrote:
> > >On 2015/11/6 20:40, Tomasz Nowicki wrote:
> > >>On 06.11.2015 12:46, Jiang Liu wrote:
> > >>>On 2015/11/6 18:37, Tomasz Nowic
[CC'ing Arnd]
On Mon, Nov 09, 2015 at 03:07:38PM +0100, Tomasz Nowicki wrote:
> On 06.11.2015 14:22, Jiang Liu wrote:
> >On 2015/11/6 20:40, Tomasz Nowicki wrote:
> >>On 06.11.2015 12:46, Jiang Liu wrote:
> >>>On 2015/11/6 18:37, Tomasz Nowicki wrote:
> On 06.11.2015 09:52, Jiang Liu wrote:
>
On 06.11.2015 14:22, Jiang Liu wrote:
On 2015/11/6 20:40, Tomasz Nowicki wrote:
On 06.11.2015 12:46, Jiang Liu wrote:
On 2015/11/6 18:37, Tomasz Nowicki wrote:
On 06.11.2015 09:52, Jiang Liu wrote:
Sure, ARM64 (0-16M IO space) QEMU example:
DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDec
On 2015/11/6 23:32, Jiang Liu wrote:
> On 2015/11/6 22:45, Lorenzo Pieralisi wrote:
>> On Fri, Nov 06, 2015 at 09:22:46PM +0800, Jiang Liu wrote:
>>> On 2015/11/6 20:40, Tomasz Nowicki wrote:
On 06.11.2015 12:46, Jiang Liu wrote:
> On 2015/11/6 18:37, Tomasz Nowicki wrote:
>> On 06.11.
On 2015/11/6 22:45, Lorenzo Pieralisi wrote:
> On Fri, Nov 06, 2015 at 09:22:46PM +0800, Jiang Liu wrote:
>> On 2015/11/6 20:40, Tomasz Nowicki wrote:
>>> On 06.11.2015 12:46, Jiang Liu wrote:
On 2015/11/6 18:37, Tomasz Nowicki wrote:
> On 06.11.2015 09:52, Jiang Liu wrote:
> Sure, ARM
On Fri, Nov 06, 2015 at 09:22:46PM +0800, Jiang Liu wrote:
> On 2015/11/6 20:40, Tomasz Nowicki wrote:
> > On 06.11.2015 12:46, Jiang Liu wrote:
> >> On 2015/11/6 18:37, Tomasz Nowicki wrote:
> >>> On 06.11.2015 09:52, Jiang Liu wrote:
> >>> Sure, ARM64 (0-16M IO space) QEMU example:
> >>> DWordIO
On 2015/11/6 20:40, Tomasz Nowicki wrote:
> On 06.11.2015 12:46, Jiang Liu wrote:
>> On 2015/11/6 18:37, Tomasz Nowicki wrote:
>>> On 06.11.2015 09:52, Jiang Liu wrote:
>>> Sure, ARM64 (0-16M IO space) QEMU example:
>>> DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
>>>
On Fri, Nov 06, 2015 at 04:52:47PM +0800, Jiang Liu wrote:
[...]
> >>> +int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info)
> >>> +{
> >>> + int ret;
> >>> + struct list_head *list = &info->resources;
> >>> + struct acpi_device *device = info->bridge;
> >>> + struct resource_entry
On 06.11.2015 12:46, Jiang Liu wrote:
On 2015/11/6 18:37, Tomasz Nowicki wrote:
On 06.11.2015 09:52, Jiang Liu wrote:
On 2015/11/6 2:19, Lorenzo Pieralisi wrote:
On Thu, Nov 05, 2015 at 03:21:34PM +0100, Tomasz Nowicki wrote:
On 14.10.2015 08:29, Jiang Liu wrote:
[...]
+static void acpi_p
On 2015/11/6 18:37, Tomasz Nowicki wrote:
> On 06.11.2015 09:52, Jiang Liu wrote:
>> On 2015/11/6 2:19, Lorenzo Pieralisi wrote:
>>> On Thu, Nov 05, 2015 at 03:21:34PM +0100, Tomasz Nowicki wrote:
On 14.10.2015 08:29, Jiang Liu wrote:
>>>
>>> [...]
>>>
> +static void acpi_pci_root_validate
On 06.11.2015 09:52, Jiang Liu wrote:
On 2015/11/6 2:19, Lorenzo Pieralisi wrote:
On Thu, Nov 05, 2015 at 03:21:34PM +0100, Tomasz Nowicki wrote:
On 14.10.2015 08:29, Jiang Liu wrote:
[...]
+static void acpi_pci_root_validate_resources(struct device *dev,
+
On 05.11.2015 19:19, Lorenzo Pieralisi wrote:
On Thu, Nov 05, 2015 at 03:21:34PM +0100, Tomasz Nowicki wrote:
On 14.10.2015 08:29, Jiang Liu wrote:
[...]
+static void acpi_pci_root_validate_resources(struct device *dev,
+struct list_head *resources
On 2015/11/6 2:19, Lorenzo Pieralisi wrote:
> On Thu, Nov 05, 2015 at 03:21:34PM +0100, Tomasz Nowicki wrote:
>> On 14.10.2015 08:29, Jiang Liu wrote:
>
> [...]
>
>>> +static void acpi_pci_root_validate_resources(struct device *dev,
>>> +struct list_head *r
On 2015/11/6 2:19, Lorenzo Pieralisi wrote:
> On Thu, Nov 05, 2015 at 03:21:34PM +0100, Tomasz Nowicki wrote:
>> On 14.10.2015 08:29, Jiang Liu wrote:
>
> [...]
>
>>> +static void acpi_pci_root_validate_resources(struct device *dev,
>>> +struct list_head *r
On 2015/11/5 22:21, Tomasz Nowicki wrote:
> On 14.10.2015 08:29, Jiang Liu wrote:
>> Introduce common interface acpi_pci_root_create() and related data
>> structures to create PCI root bus for ACPI PCI host bridges. It will
>> be used to kill duplicated arch specific code for IA64 and x86. It may
>
On Thu, Nov 05, 2015 at 03:21:34PM +0100, Tomasz Nowicki wrote:
> On 14.10.2015 08:29, Jiang Liu wrote:
[...]
> >+static void acpi_pci_root_validate_resources(struct device *dev,
> >+ struct list_head *resources,
> >+
On 14.10.2015 08:29, Jiang Liu wrote:
Introduce common interface acpi_pci_root_create() and related data
structures to create PCI root bus for ACPI PCI host bridges. It will
be used to kill duplicated arch specific code for IA64 and x86. It may
also help ARM64 in future.
Reviewed-by: Lorenzo Pie
On 21.10.2015 13:42, Lorenzo Pieralisi wrote:
On Wed, Oct 21, 2015 at 01:27:33PM +0200, Tomasz Nowicki wrote:
On 21.10.2015 13:02, Liviu Dudau wrote:
On Wed, Oct 21, 2015 at 11:57:53AM +0200, Tomasz Nowicki wrote:
On 14.10.2015 08:29, Jiang Liu wrote:
Introduce common interface acpi_pci_root_
On Wed, Oct 21, 2015 at 07:49:13PM +0800, Jiang Liu wrote:
> On 2015/10/21 19:27, Tomasz Nowicki wrote:
> > On 21.10.2015 13:02, Liviu Dudau wrote:
> >> On Wed, Oct 21, 2015 at 11:57:53AM +0200, Tomasz Nowicki wrote:
> >>> On 14.10.2015 08:29, Jiang Liu wrote:
> Introduce common interface acpi
On 2015/10/21 19:27, Tomasz Nowicki wrote:
> On 21.10.2015 13:02, Liviu Dudau wrote:
>> On Wed, Oct 21, 2015 at 11:57:53AM +0200, Tomasz Nowicki wrote:
>>> On 14.10.2015 08:29, Jiang Liu wrote:
Introduce common interface acpi_pci_root_create() and related data
structures to create PCI roo
On Wed, Oct 21, 2015 at 01:27:33PM +0200, Tomasz Nowicki wrote:
> On 21.10.2015 13:02, Liviu Dudau wrote:
> >On Wed, Oct 21, 2015 at 11:57:53AM +0200, Tomasz Nowicki wrote:
> >>On 14.10.2015 08:29, Jiang Liu wrote:
> >>>Introduce common interface acpi_pci_root_create() and related data
> >>>structu
On Wed, Oct 21, 2015 at 01:27:33PM +0200, Tomasz Nowicki wrote:
> On 21.10.2015 13:02, Liviu Dudau wrote:
> >On Wed, Oct 21, 2015 at 11:57:53AM +0200, Tomasz Nowicki wrote:
> >>On 14.10.2015 08:29, Jiang Liu wrote:
> >>>Introduce common interface acpi_pci_root_create() and related data
> >>>structu
On 21.10.2015 13:02, Liviu Dudau wrote:
On Wed, Oct 21, 2015 at 11:57:53AM +0200, Tomasz Nowicki wrote:
On 14.10.2015 08:29, Jiang Liu wrote:
Introduce common interface acpi_pci_root_create() and related data
structures to create PCI root bus for ACPI PCI host bridges. It will
be used to kill d
On Wed, Oct 21, 2015 at 11:57:53AM +0200, Tomasz Nowicki wrote:
> On 14.10.2015 08:29, Jiang Liu wrote:
> >Introduce common interface acpi_pci_root_create() and related data
> >structures to create PCI root bus for ACPI PCI host bridges. It will
> >be used to kill duplicated arch specific code for
On 14.10.2015 08:29, Jiang Liu wrote:
Introduce common interface acpi_pci_root_create() and related data
structures to create PCI root bus for ACPI PCI host bridges. It will
be used to kill duplicated arch specific code for IA64 and x86. It may
also help ARM64 in future.
Reviewed-by: Lorenzo Pie
On Wed, Oct 14, 2015 at 02:29:39PM +0800, Jiang Liu wrote:
> Introduce common interface acpi_pci_root_create() and related data
> structures to create PCI root bus for ACPI PCI host bridges. It will
> be used to kill duplicated arch specific code for IA64 and x86. It may
> also help ARM64 in future
Introduce common interface acpi_pci_root_create() and related data
structures to create PCI root bus for ACPI PCI host bridges. It will
be used to kill duplicated arch specific code for IA64 and x86. It may
also help ARM64 in future.
Reviewed-by: Lorenzo Pieralisi
Tested-by: Tony Luck
Signed-off
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