On Mon, Mar 03, 2014 at 09:38:03AM +, Shevchenko, Andriy wrote:
> > + if (IS_ERR(bdev->bamclk))
> > + return PTR_ERR(bdev->bamclk);
> > +
> > + ret = clk_prepare_enable(bdev->bamclk);
> > + if (ret) {
> > + dev_err(bdev->dev, "failed to prepare/enable clock\n");
> >
On Sat, Mar 08, 2014 at 12:29:49AM +0200, Stanimir Vabanov wrote:
> > +#define BAM_IRQ_SRCS_EE(pipe) (0x0800 + ((pipe) * 0x80))
> > +#define BAM_IRQ_SRCS_MSK_EE(pipe) (0x0804 + ((pipe) * 0x80))
>
> s/pipe/ee ?
>
Ah good catch. I'll fix that.
> > +struct bam_chan {
> > + struct
Hi Andy,
Thanks for the patch.
> +#define BAM_IRQ_SRCS_EE(pipe)(0x0800 + ((pipe) * 0x80))
> +#define BAM_IRQ_SRCS_MSK_EE(pipe)(0x0804 + ((pipe) * 0x80))
s/pipe/ee ?
> +struct bam_chan {
> + struct virt_dma_chan vc;
> +
> + struct bam_device *bdev;
> +
> + /*
On Mon, 2014-03-03 at 00:30 -0600, Andy Gross wrote:
> Add the DMA engine driver for the QCOM Bus Access Manager (BAM) DMA controller
> found in the MSM 8x74 platforms.
>
> Each BAM DMA device is associated with a specific on-chip peripheral. Each
> channel provides a uni-directional data transfe
On Mon, 2014-03-03 at 00:30 -0600, Andy Gross wrote:
> Add the DMA engine driver for the QCOM Bus Access Manager (BAM) DMA controller
> found in the MSM 8x74 platforms.
>
> Each BAM DMA device is associated with a specific on-chip peripheral. Each
> channel provides a uni-directional data transfe
Add the DMA engine driver for the QCOM Bus Access Manager (BAM) DMA controller
found in the MSM 8x74 platforms.
Each BAM DMA device is associated with a specific on-chip peripheral. Each
channel provides a uni-directional data transfer engine that is capable of
transferring data between the perip
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