Re: [Patch v9] driver/clk/clk-si5338: Add common clock framework driver for si5338

Quoting Radu Nicolae Pirea (2019-05-31 07:06:03) > > + remove_common_factor([1]); > > + dev_dbg(>client->dev, > > + "PLL output frequency: %llu+%llu/%llu Hz\n", > > + rate[0], rate[1], rate[2]); > > + > > + return rate[0]; > > +} > > + > > +static long

Re: [EXT] Re: [Patch v9] driver/clk/clk-si5338: Add common clock framework driver for si5338

On 5/31/19 7:06 AM, Radu Nicolae Pirea wrote: > Caution: EXT Email > > Hi, > > @York I want to continue the work on this driver and I want to upstream > it. Are you OK with this? > > I saw later improvement suggestions related to the bindings and I will > make the changes. Radu, You are

Re: [Patch v9] driver/clk/clk-si5338: Add common clock framework driver for si5338

Hi, @York I want to continue the work on this driver and I want to upstream it. Are you OK with this? I saw later improvement suggestions related to the bindings and I will make the changes. @all please look at my below comment about si5338_pll_round_rate function. On Fri, 2016-08-26 at 14:45

Re: [Patch v9] driver/clk/clk-si5338: Add common clock framework driver for si5338

On 09/02/2016 07:04 AM, Rob Herring wrote: > On Fri, Aug 26, 2016 at 02:45:49PM -0700, York Sun wrote: >> From: York Sun >> >> SI5338 is a programmable clock generator. It has 4 sets of inputs, >> PLL, multisynth and dividers to make 4 outputs. This driver splits >> them

Re: [Patch v9] driver/clk/clk-si5338: Add common clock framework driver for si5338

On 09/02/2016 07:04 AM, Rob Herring wrote: > On Fri, Aug 26, 2016 at 02:45:49PM -0700, York Sun wrote: >> From: York Sun >> >> SI5338 is a programmable clock generator. It has 4 sets of inputs, >> PLL, multisynth and dividers to make 4 outputs. This driver splits >> them into multiple clocks to

Re: [Patch v9] driver/clk/clk-si5338: Add common clock framework driver for si5338

On Fri, Aug 26, 2016 at 02:45:49PM -0700, York Sun wrote: > From: York Sun > > SI5338 is a programmable clock generator. It has 4 sets of inputs, > PLL, multisynth and dividers to make 4 outputs. This driver splits > them into multiple clocks to comply with common clock

Re: [Patch v9] driver/clk/clk-si5338: Add common clock framework driver for si5338

On Fri, Aug 26, 2016 at 02:45:49PM -0700, York Sun wrote: > From: York Sun > > SI5338 is a programmable clock generator. It has 4 sets of inputs, > PLL, multisynth and dividers to make 4 outputs. This driver splits > them into multiple clocks to comply with common clock framework. > > See

[Patch v9] driver/clk/clk-si5338: Add common clock framework driver for si5338

From: York Sun SI5338 is a programmable clock generator. It has 4 sets of inputs, PLL, multisynth and dividers to make 4 outputs. This driver splits them into multiple clocks to comply with common clock framework. See

[Patch v9] driver/clk/clk-si5338: Add common clock framework driver for si5338

From: York Sun SI5338 is a programmable clock generator. It has 4 sets of inputs, PLL, multisynth and dividers to make 4 outputs. This driver splits them into multiple clocks to comply with common clock framework. See Documentation/devicetree/bindings/clock/silabs,si5338.txt for details.