On 2017/12/12 2:58, Suzuki K Poulose wrote:
> Hi gengdongjiu
>
> Sorry for the late response. I have a similar patch to add the support for
> "FHM", which I was about to post it this week.
Suzuki, you are welcome.
May be you can not post again to avoid the duplicate review, thanks!
>
> On 11/12
On 2017/12/11 21:29, Dave Martin wrote:
>> Thanks for the point out.
>> In fact, this feature only adds two instructions:
>> FP16 * FP16 + FP32
>> FP16 * FP16 - FP32
>>
>> The spec call this bit to ID_AA64ISAR0_EL1.FHM, I do not know why it
>> will call "FHM", I think call it "FMLXL" may be bette
Hi gengdongjiu
Sorry for the late response. I have a similar patch to add the support
for "FHM", which I was about to post it this week.
On 11/12/17 13:29, Dave Martin wrote:
On Mon, Dec 11, 2017 at 08:47:00PM +0800, gengdongjiu wrote:
On 2017/12/11 19:59, Dave P Martin wrote:
On Sat, Dec
On Mon, Dec 11, 2017 at 08:47:00PM +0800, gengdongjiu wrote:
>
> On 2017/12/11 19:59, Dave P Martin wrote:
> > On Sat, Dec 09, 2017 at 03:28:42PM +, Dongjiu Geng wrote:
> >> ARM v8.4 extensions include support for new floating point
> >> multiplication variant instructions to the AArch64 SIMD
On 2017/12/11 19:59, Dave P Martin wrote:
> On Sat, Dec 09, 2017 at 03:28:42PM +, Dongjiu Geng wrote:
>> ARM v8.4 extensions include support for new floating point
>> multiplication variant instructions to the AArch64 SIMD
>
> Do we have any human-readable description of what the new instruct
On Sat, Dec 09, 2017 at 03:28:42PM +, Dongjiu Geng wrote:
> ARM v8.4 extensions include support for new floating point
> multiplication variant instructions to the AArch64 SIMD
Do we have any human-readable description of what the new instructions
do?
Since the v8.4 spec itself only describes
ARM v8.4 extensions include support for new floating point
multiplication variant instructions to the AArch64 SIMD
instructions set. Let the userspace know about it via a
HWCAP bit and MRS emulation.
Cc: Suzuki K Poulose
Signed-off-by: Dongjiu Geng
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My platform supports this feature, so I nee
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