Re: [RESEND PATCH V4 1/4] stm class: provision for statically assigned masterIDs

2016-03-31 Thread Mathieu Poirier
On 31 March 2016 at 07:20, Alexander Shishkin wrote: > Mathieu Poirier writes: > >> On 21 March 2016 at 01:47, Alexander Shishkin >> wrote: >>> Chunyan Zhang writes: >>> From: Mathieu Poirier Some architecture like ARM assign masterIDs at the HW design phase. Those are the

Re: [RESEND PATCH V4 1/4] stm class: provision for statically assigned masterIDs

2016-03-31 Thread Alexander Shishkin
Mathieu Poirier writes: > On 21 March 2016 at 01:47, Alexander Shishkin > wrote: >> Chunyan Zhang writes: >> >>> From: Mathieu Poirier >>> >>> Some architecture like ARM assign masterIDs at the HW design >>> phase. Those are therefore unreachable to users, making masterID >>> management in th

Re: [RESEND PATCH V4 1/4] stm class: provision for statically assigned masterIDs

2016-03-21 Thread Mathieu Poirier
On 21 March 2016 at 01:47, Alexander Shishkin wrote: > Chunyan Zhang writes: > >> From: Mathieu Poirier >> >> Some architecture like ARM assign masterIDs at the HW design >> phase. Those are therefore unreachable to users, making masterID >> management in the generic STM core irrelevant. >> >>

Re: [RESEND PATCH V4 1/4] stm class: provision for statically assigned masterIDs

2016-03-21 Thread Alexander Shishkin
Chunyan Zhang writes: > From: Mathieu Poirier > > Some architecture like ARM assign masterIDs at the HW design > phase. Those are therefore unreachable to users, making masterID > management in the generic STM core irrelevant. > > In this kind of configuration channels are shared between master

[RESEND PATCH V4 1/4] stm class: provision for statically assigned masterIDs

2016-03-07 Thread Chunyan Zhang
From: Mathieu Poirier Some architecture like ARM assign masterIDs at the HW design phase. Those are therefore unreachable to users, making masterID management in the generic STM core irrelevant. In this kind of configuration channels are shared between masters rather than being allocated on a p