Re: [RESEND PATCH v4] clk/axs10x: Add I2S PLL clock driver

2016-04-21 Thread Vineet Gupta
On Thursday 21 April 2016 05:48 PM, Alexey Brodkin wrote: > Hi Jose, > > On Thu, 2016-04-21 at 10:51 +0100, Jose Abreu wrote: >> Hi Alexey, > > > Otherwise, I still prefer two DTS files for the two different FPGA > versions. At the least, please use ioremap for any pointers that > yo

Re: [RESEND PATCH v4] clk/axs10x: Add I2S PLL clock driver

2016-04-21 Thread Alexey Brodkin
Hi Jose, On Thu, 2016-04-21 at 14:10 +0100, Jose Abreu wrote: > Hi Alexey, > > > On 21-04-2016 13:18, Alexey Brodkin wrote: > > > > Hi Jose, > > > > On Thu, 2016-04-21 at 10:51 +0100, Jose Abreu wrote: > > > > > > Hi Alexey, > > >  > > Ok reference clock will change. > > But I may guess we'll

Re: [RESEND PATCH v4] clk/axs10x: Add I2S PLL clock driver

2016-04-21 Thread Jose Abreu
Hi Alexey, On 21-04-2016 13:18, Alexey Brodkin wrote: > Hi Jose, > > On Thu, 2016-04-21 at 10:51 +0100, Jose Abreu wrote: >> Hi Alexey, > > Otherwise, I still prefer two DTS files for the two different FPGA > versions. At the least, please use ioremap for any pointers that > you readl

Re: [RESEND PATCH v4] clk/axs10x: Add I2S PLL clock driver

2016-04-21 Thread Alexey Brodkin
Hi Jose, On Thu, 2016-04-21 at 10:51 +0100, Jose Abreu wrote: > Hi Alexey, > > > > Otherwise, I still prefer two DTS files for the two different FPGA > > > > versions. At the least, please use ioremap for any pointers that > > > > you readl/writel here. > > > > > > > > Beyond that, we should ha

Re: [RESEND PATCH v4] clk/axs10x: Add I2S PLL clock driver

2016-04-21 Thread Jose Abreu
Hi Alexey, On 20-04-2016 17:12, Alexey Brodkin wrote: > Hi Jose, Stephen, > > On Wed, 2016-04-20 at 10:47 +0100, Jose Abreu wrote: >> Hi Stephen, >> >> >> On 20-04-2016 02:54, Stephen Boyd wrote: >>> On 04/19, Jose Abreu wrote: @Stephen: can you give some input so that I can submit a v6? >>>

Re: [RESEND PATCH v4] clk/axs10x: Add I2S PLL clock driver

2016-04-20 Thread Alexey Brodkin
Hi Jose, Stephen, On Wed, 2016-04-20 at 10:47 +0100, Jose Abreu wrote: > Hi Stephen, > > > On 20-04-2016 02:54, Stephen Boyd wrote: > > > > On 04/19, Jose Abreu wrote: > > > > > > @Stephen: can you give some input so that I can submit a v6? > > > > > I don't prefer putting the second register

Re: [RESEND PATCH v4] clk/axs10x: Add I2S PLL clock driver

2016-04-20 Thread Jose Abreu
Hi Stephen, On 20-04-2016 02:54, Stephen Boyd wrote: > On 04/19, Jose Abreu wrote: >> @Stephen: can you give some input so that I can submit a v6? >> > I don't prefer putting the second register in the same DT node, > but that's really up to the DT reviewers to approve such a > design. The curren

Re: [RESEND PATCH v4] clk/axs10x: Add I2S PLL clock driver

2016-04-19 Thread Stephen Boyd
On 04/19, Jose Abreu wrote: > > @Stephen: can you give some input so that I can submit a v6? > I don't prefer putting the second register in the same DT node, but that's really up to the DT reviewers to approve such a design. The current binding has been acked by Rob right? Assuming the new bin

Re: [RESEND PATCH v4] clk/axs10x: Add I2S PLL clock driver

2016-04-19 Thread Jose Abreu
Hi Vineet, On 18-04-2016 12:49, Vineet Gupta wrote: > On Monday 18 April 2016 04:00 PM, Jose Abreu wrote: + if (readl((void *)FPGA_VER_INFO) <= FPGA_VER_27M) { Please don't readl directly from addresses. I think I mentioned that before and didn't get back to you when you replied a

Re: [RESEND PATCH v4] clk/axs10x: Add I2S PLL clock driver

2016-04-18 Thread Vineet Gupta
On Monday 18 April 2016 04:00 PM, Jose Abreu wrote: >>> + if (readl((void *)FPGA_VER_INFO) <= FPGA_VER_27M) { >> > Please don't readl directly from addresses. I think I mentioned >> > that before and didn't get back to you when you replied asking >> > for other solutions. I still think a proper D

Re: [RESEND PATCH v4] clk/axs10x: Add I2S PLL clock driver

2016-04-18 Thread Jose Abreu
Hi Stephen, On 16-04-2016 00:46, Stephen Boyd wrote: > On 04/11, Jose Abreu wrote: >> new file mode 100644 >> index 000..3ba4e2f >> --- /dev/null >> +++ b/drivers/clk/axs10x/i2s_pll_clock.c >> @@ -0,0 +1,217 @@ >> + >> +static int i2s_pll_clk_probe(struct platform_device *pdev) >> +{ >> +

Re: [RESEND PATCH v4] clk/axs10x: Add I2S PLL clock driver

2016-04-15 Thread Stephen Boyd
On 04/11, Jose Abreu wrote: > new file mode 100644 > index 000..3ba4e2f > --- /dev/null > +++ b/drivers/clk/axs10x/i2s_pll_clock.c > @@ -0,0 +1,217 @@ > + > +static int i2s_pll_clk_probe(struct platform_device *pdev) > +{ > + struct device *dev = &pdev->dev; > + struct device_node *node

Re: [RESEND PATCH v4] clk/axs10x: Add I2S PLL clock driver

2016-04-15 Thread sb...@codeaurora.org
On 04/15, Alexey Brodkin wrote: > Hi Stephen, > > On Mon, 2016-04-11 at 15:03 -0700, sb...@codeaurora.org wrote: > > On 04/11, Alexey Brodkin wrote: > > > > > > On Mon, 2016-04-11 at 11:41 +0100, Jose Abreu wrote: > > > > > > > > + * warranty of any kind, whether express or implied. > > > > + */

Re: [RESEND PATCH v4] clk/axs10x: Add I2S PLL clock driver

2016-04-15 Thread Alexey Brodkin
Hi Stephen, On Mon, 2016-04-11 at 15:03 -0700, sb...@codeaurora.org wrote: > On 04/11, Alexey Brodkin wrote: > > > > On Mon, 2016-04-11 at 11:41 +0100, Jose Abreu wrote: > > > > > > + * warranty of any kind, whether express or implied. > > > + */ > > > + > > > +#include > > > +#include > > > +

Re: [RESEND PATCH v4] clk/axs10x: Add I2S PLL clock driver

2016-04-11 Thread sb...@codeaurora.org
On 04/11, Alexey Brodkin wrote: > On Mon, 2016-04-11 at 11:41 +0100, Jose Abreu wrote: > > + * warranty of any kind, whether express or implied. > > + */ > > + > > +#include > > +#include > > +#include > > +#include > > +#include > > "linux/platform_device.h" includes "linux/device.h" so you

Re: [RESEND PATCH v4] clk/axs10x: Add I2S PLL clock driver

2016-04-11 Thread Alexey Brodkin
Hi Jose, On Mon, 2016-04-11 at 11:41 +0100, Jose Abreu wrote: > The ARC SDP I2S clock can be programmed using a > specific PLL. > > This patch has the goal of adding a clock driver > that programs this PLL. > > At this moment the rate values are hardcoded in > a table but in the future it would

[RESEND PATCH v4] clk/axs10x: Add I2S PLL clock driver

2016-04-11 Thread Jose Abreu
The ARC SDP I2S clock can be programmed using a specific PLL. This patch has the goal of adding a clock driver that programs this PLL. At this moment the rate values are hardcoded in a table but in the future it would be ideal to use a function which determines the PLL values given the desired ra