Re: [RFC/RFT PATCH] Revert "ASoC: fsl_esai: ETDR and TX0~5 registers are non volatile"

2019-06-07 Thread Nicolin Chen
Hello Mark, On Fri, Jun 07, 2019 at 12:12:44PM +0100, Mark Brown wrote: > On Thu, Jun 06, 2019 at 04:01:05PM -0700, Nicolin Chen wrote: > > This reverts commit 8973112aa41b8ad956a5b47f2fe17bc2a5cf2645. > > Please use subject lines matching the style for the subsystem. This > makes it easier for

Re: [RFC/RFT PATCH] Revert "ASoC: fsl_esai: ETDR and TX0~5 registers are non volatile"

2019-06-07 Thread Mark Brown
On Thu, Jun 06, 2019 at 04:01:05PM -0700, Nicolin Chen wrote: > This reverts commit 8973112aa41b8ad956a5b47f2fe17bc2a5cf2645. Please use subject lines matching the style for the subsystem. This makes it easier for people to identify relevant patches. > 1) Though ETDR and TX0~5 are not volatile

[RFC/RFT PATCH] Revert "ASoC: fsl_esai: ETDR and TX0~5 registers are non volatile"

2019-06-06 Thread Nicolin Chen
This reverts commit 8973112aa41b8ad956a5b47f2fe17bc2a5cf2645. ETDR and TX0~5 are TX data registers. There are a couple of reasons to revert the change: 1) Though ETDR and TX0~5 are not volatile but write-only registers, they should not be cached either. According to the definition of