Re: [RFC][PATCH 1/7] perf/x86/intel: Rework the large PEBS setup code

2016-07-10 Thread Jiri Olsa
On Sat, Jul 09, 2016 at 12:25:09AM +0200, Peter Zijlstra wrote: > On Sat, Jul 09, 2016 at 12:00:47AM +0200, Peter Zijlstra wrote: > > Yes, you're right. Let me try and see if I can make that better. > > Something like so? yep, seems good ;-) jirka > > --- > --- a/arch/x86/events/intel/ds.c > +

Re: [RFC][PATCH 1/7] perf/x86/intel: Rework the large PEBS setup code

2016-07-08 Thread Peter Zijlstra
On Sat, Jul 09, 2016 at 12:00:47AM +0200, Peter Zijlstra wrote: > Yes, you're right. Let me try and see if I can make that better. Something like so? --- --- a/arch/x86/events/intel/ds.c +++ b/arch/x86/events/intel/ds.c @@ -831,6 +831,18 @@ static inline void pebs_update_threshold ds->peb

Re: [RFC][PATCH 1/7] perf/x86/intel: Rework the large PEBS setup code

2016-07-08 Thread Peter Zijlstra
On Fri, Jul 08, 2016 at 06:36:16PM +0200, Jiri Olsa wrote: > On Fri, Jul 08, 2016 at 03:31:00PM +0200, Peter Zijlstra wrote: > > SNIP > > > /* > > -* When the event is constrained enough we can use a larger > > -* threshold and run the event with less frequent PMI. > > +* Use auto

Re: [RFC][PATCH 1/7] perf/x86/intel: Rework the large PEBS setup code

2016-07-08 Thread Jiri Olsa
On Fri, Jul 08, 2016 at 03:31:00PM +0200, Peter Zijlstra wrote: SNIP > /* > - * When the event is constrained enough we can use a larger > - * threshold and run the event with less frequent PMI. > + * Use auto-reload if possible to save a MSR write in the PMI. > + * This

[RFC][PATCH 1/7] perf/x86/intel: Rework the large PEBS setup code

2016-07-08 Thread Peter Zijlstra
In order to allow optimizing perf_pmu_sched_task() we must ensure perf_sched_cb_{inc,dec} are no longer called from NMI context; this means that pmu::{start,stop}() can no longer use them. Prepare for this by reworking the whole large PEBS setup code. The current code relied on the cpuc->pebs_ena