On Thu, Jul 06, 2017 at 11:13:44AM +0200, Thierry Reding wrote:
> On Tue, Jun 27, 2017 at 12:05:22PM +0200, Alvaro Gamez Machado wrote:
> > a) Changing "xlnx,axi-timer-2.0" compatible string for this device to
> > something
> >different like xlnx,axi-pwm-2.0?
>
> I don't see a xlnx,axi-timer-
On Tue, Jun 27, 2017 at 12:05:22PM +0200, Alvaro Gamez Machado wrote:
> This patch adds support for the IP core provided by Xilinx.
> This IP core can function as a two independent timers, but can also use
> both counters as values for period and duty cycle of a PWM output.
>
> Signed-off-by: Alva
This patch adds support for the IP core provided by Xilinx.
This IP core can function as a two independent timers, but can also use
both counters as values for period and duty cycle of a PWM output.
Signed-off-by: Alvaro Gamez Machado
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Hi!
AXI timer IP core is also used on Microblaze based s
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