On 14 October 2016 at 09:56, Ravikumar wrote:
> Dynamic switching on OMAP I2C IP could be a difficult task.
In fact I wouldn't even bother trying. The thread I linked to received
some follow-up by someone wrestling with this and it actually resulted
in the suggestion to use separate master-only a
On Monday 29 August 2016 09:13 AM, Matthijs van Duin wrote:
On 28 August 2016 at 07:35, Wolfram Sang wrote:
Well, I2C is simple, what could go wrong? :/
Actually I2C is elegant and *seems* simple, but in all its
asynchronicity there are actually a surprising number of fine details
you can tr
On Saturday 27 August 2016 07:29 PM, Matthijs van Duin wrote:
Greetings, unfortunate souls trying to use the omap-i2c peripheral in
slave mode! :-)
That would be me :( and greetings to you too :)
I recently posted some stuff about exactly that topic on TI's E2E
forum, you may want to read th
On Thursday 25 August 2016 10:44 PM, Wolfram Sang wrote:
Hi,
The omap i2c controller (at least on dra7x devices)
doesn't have start/stop (STT/STP) support for slave mode
so event #5 is not implemented in the driver.
I think you can deduce that. If a new {READ|WRITE}_REQUESTED slave event
co
On 28 August 2016 at 07:35, Wolfram Sang wrote:
> Well, I2C is simple, what could go wrong? :/
Actually I2C is elegant and *seems* simple, but in all its
asynchronicity there are actually a surprising number of fine details
you can trip over. Maybe that's why so many i2c controllers suck: since
> Making a mess of I2C controllers seems to be a popular hobby among
> chip designers :P
Well, I2C is simple, what could go wrong? :/
> A lot of the details (including the completely bizarre behaviour of
> its innocuous-looking irq registers) would be quite non-trivial to
> figure out without pu
On 27 August 2016 at 19:22, Wolfram Sang wrote:
> Uh, that sounds like bad HW...
Making a mess of I2C controllers seems to be a popular hobby among
chip designers :P
( I also really like how the RPi handles clock stretching... *cough* )
> While it surely is nice to have super detailed informati
> Greetings, unfortunate souls trying to use the omap-i2c peripheral in
> slave mode! :-)
Uh, that sounds like bad HW...
> I recently posted some stuff about exactly that topic on TI's E2E
> forum, you may want to read this warning:
> http://e2e.ti.com/support/arm/sitara_arm/f/791/p/514961/19558
Greetings, unfortunate souls trying to use the omap-i2c peripheral in
slave mode! :-)
I recently posted some stuff about exactly that topic on TI's E2E
forum, you may want to read this warning:
http://e2e.ti.com/support/arm/sitara_arm/f/791/p/514961/1955843#1955843
and post contains suggestions o
Hi,
> The omap i2c controller (at least on dra7x devices)
> doesn't have start/stop (STT/STP) support for slave mode
> so event #5 is not implemented in the driver.
I think you can deduce that. If a new {READ|WRITE}_REQUESTED slave event
comes in when you had *_PROCESSED events before, there mu
Hi Ravikumar
Some sanity comments, just good to have.
> +#ifdef CONFIG_I2C_SLAVE
> +static int omap_i2c_slave_irq(struct omap_i2c_dev *omap)
> +{
> + u16 stat_raw;
> + u16 stat;
> + u16 bits;
> + u8 value;
> +
> + stat_raw = omap_i2c_read_reg(omap, OMAP_I2C_IP_V2_IRQ
I2C controller on most of the omap devices has both master and slave
capability but the i2c framework has been missing support for registering
a bus in slave mode for long.
Recently the i2c slave support has been added to i2c framework,
the following patch adds the required support for omap_i2c dr
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