On 02/04/2014 01:39 AM, Alexandre Courbot wrote:
> On 02/04/2014 12:55 PM, Ben Skeggs wrote:
>> On Sat, Feb 1, 2014 at 1:16 PM, Alexandre Courbot
>> wrote:
>>> GK20A's timer is directly attached to the system timer and cannot be
>>> calibrated. Skip the calibration phase on that chip since the
On 02/04/2014 01:39 AM, Alexandre Courbot wrote:
On 02/04/2014 12:55 PM, Ben Skeggs wrote:
On Sat, Feb 1, 2014 at 1:16 PM, Alexandre Courbot
acour...@nvidia.com wrote:
GK20A's timer is directly attached to the system timer and cannot be
calibrated. Skip the calibration phase on that chip
On 02/04/2014 12:55 PM, Ben Skeggs wrote:
On Sat, Feb 1, 2014 at 1:16 PM, Alexandre Courbot wrote:
GK20A's timer is directly attached to the system timer and cannot be
calibrated. Skip the calibration phase on that chip since the
corresponding registers do not exist.
Just a curiosity: What
On 02/04/2014 12:55 PM, Ben Skeggs wrote:
On Sat, Feb 1, 2014 at 1:16 PM, Alexandre Courbot acour...@nvidia.com wrote:
GK20A's timer is directly attached to the system timer and cannot be
calibrated. Skip the calibration phase on that chip since the
corresponding registers do not exist.
Just a
On Sat, Feb 1, 2014 at 1:16 PM, Alexandre Courbot wrote:
> GK20A's timer is directly attached to the system timer and cannot be
> calibrated. Skip the calibration phase on that chip since the
> corresponding registers do not exist.
Just a curiosity: What timer resolution does the HW initialise
On Sat, Feb 1, 2014 at 1:16 PM, Alexandre Courbot acour...@nvidia.com wrote:
GK20A's timer is directly attached to the system timer and cannot be
calibrated. Skip the calibration phase on that chip since the
corresponding registers do not exist.
Just a curiosity: What timer resolution does the
GK20A's timer is directly attached to the system timer and cannot be
calibrated. Skip the calibration phase on that chip since the
corresponding registers do not exist.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/drm/nouveau/core/subdev/timer/nv04.c | 19 +--
1 file
GK20A's timer is directly attached to the system timer and cannot be
calibrated. Skip the calibration phase on that chip since the
corresponding registers do not exist.
Signed-off-by: Alexandre Courbot acour...@nvidia.com
---
drivers/gpu/drm/nouveau/core/subdev/timer/nv04.c | 19
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