Re: [RFC PATCH] mtd: spi-nor: Added flag check for quad io protocol for micron flash parts

2015-06-20 Thread Rafał Miłecki
Hi, I don't really have enough knowledge to comment QUAD IO, I'll just include some general comments. On 18 June 2015 at 16:58, Anurag Kumar Vulisha wrote: > micron flash parts by default operates in extended spi protocol,which accepts > command on single line and can accept address & data on

Re: [RFC PATCH] mtd: spi-nor: Added flag check for quad io protocol for micron flash parts

2015-06-20 Thread Rafał Miłecki
Hi, I don't really have enough knowledge to comment QUAD IO, I'll just include some general comments. On 18 June 2015 at 16:58, Anurag Kumar Vulisha anurag.kumar.vuli...@xilinx.com wrote: micron flash parts by default operates in extended spi protocol,which accepts command on single line and

RE: [RFC PATCH] mtd: spi-nor: Added flag check for quad io protocol for micron flash parts

2015-06-19 Thread Punnaiah Choudary Kalluri
> Subject: Re: [RFC PATCH] mtd: spi-nor: Added flag check for quad io protocol > for micron flash parts > > Hi Anurag, > > We're struggling with the same issue, our Cadence QSPI controller *does* > handle four-line command, address, and data, but has to be configured > for

Re: [RFC PATCH] mtd: spi-nor: Added flag check for quad io protocol for micron flash parts

2015-06-19 Thread Graham Moore
Hi Anurag, We're struggling with the same issue, our Cadence QSPI controller *does* handle four-line command, address, and data, but has to be configured for it. The setting of quad-io-protocol mode in micron_quad_enable is really jacking up our code. We have to snoop the command stream and

RE: [RFC PATCH] mtd: spi-nor: Added flag check for quad io protocol for micron flash parts

2015-06-19 Thread Punnaiah Choudary Kalluri
...@decadent.org.uk; mika.westerb...@linux.intel.com; Bean Huo 霍斌 斌 (beanhuo); Harini Katakam; Anurag Kumar Vulisha; Srikanth Vemula; linux-kernel@vger.kernel.org; broo...@kernel.org; linux- m...@lists.infradead.org; Anirudha Sarangi; Punnaiah Choudary Kalluri Subject: Re: [RFC PATCH] mtd: spi-nor: Added flag

Re: [RFC PATCH] mtd: spi-nor: Added flag check for quad io protocol for micron flash parts

2015-06-19 Thread Graham Moore
Hi Anurag, We're struggling with the same issue, our Cadence QSPI controller *does* handle four-line command, address, and data, but has to be configured for it. The setting of quad-io-protocol mode in micron_quad_enable is really jacking up our code. We have to snoop the command stream and

[RFC PATCH] mtd: spi-nor: Added flag check for quad io protocol for micron flash parts

2015-06-18 Thread Anurag Kumar Vulisha
micron flash parts by default operates in extended spi protocol,which accepts command on single line and can accept address & data on one,two and four lines depending on the command sent.In set_quad_enable() we are enabling the quad io protocol for micron flash parts by updating the EVCR

[RFC PATCH] mtd: spi-nor: Added flag check for quad io protocol for micron flash parts

2015-06-18 Thread Anurag Kumar Vulisha
micron flash parts by default operates in extended spi protocol,which accepts command on single line and can accept address data on one,two and four lines depending on the command sent.In set_quad_enable() we are enabling the quad io protocol for micron flash parts by updating the EVCR