> > It doesn't work really, which is mostly the problem :)
> >
> > We mostly use UC on these pages, or WB within cache coherent domains.
> > mtrrs are totally useless in this situation.
> >
>
> In what sense does it not work?
oh I was mostly joking hence the smily.. really it just means thing
run
Dave Airlie wrote:
On Dec 15, 2007 8:00 AM, Siddha, Suresh B <[EMAIL PROTECTED]> wrote:
On Fri, Dec 14, 2007 at 12:28:25AM +, Dave Airlie wrote:
Yes, the main use for GPUs is to have RAM pages mapped WC, and placed into
a GART on the GPU side, currently for Intel IGD we are okay as the CPU
On Dec 15, 2007 8:00 AM, Siddha, Suresh B <[EMAIL PROTECTED]> wrote:
> On Fri, Dec 14, 2007 at 12:28:25AM +, Dave Airlie wrote:
> > Yes, the main use for GPUs is to have RAM pages mapped WC, and placed into
> > a GART on the GPU side, currently for Intel IGD we are okay as the CPU can
> >
On Fri, Dec 14, 2007 at 12:28:25AM +, Dave Airlie wrote:
> Yes, the main use for GPUs is to have RAM pages mapped WC, and placed into
> a GART on the GPU side, currently for Intel IGD we are okay as the CPU can
> access the GPU GART aperture, but other chips exist where this isn't
>
On Dec 15, 2007 8:00 AM, Siddha, Suresh B [EMAIL PROTECTED] wrote:
On Fri, Dec 14, 2007 at 12:28:25AM +, Dave Airlie wrote:
Yes, the main use for GPUs is to have RAM pages mapped WC, and placed into
a GART on the GPU side, currently for Intel IGD we are okay as the CPU can
access the
On Fri, Dec 14, 2007 at 12:28:25AM +, Dave Airlie wrote:
Yes, the main use for GPUs is to have RAM pages mapped WC, and placed into
a GART on the GPU side, currently for Intel IGD we are okay as the CPU can
access the GPU GART aperture, but other chips exist where this isn't
possible, I
Dave Airlie wrote:
On Dec 15, 2007 8:00 AM, Siddha, Suresh B [EMAIL PROTECTED] wrote:
On Fri, Dec 14, 2007 at 12:28:25AM +, Dave Airlie wrote:
Yes, the main use for GPUs is to have RAM pages mapped WC, and placed into
a GART on the GPU side, currently for Intel IGD we are okay as the CPU
It doesn't work really, which is mostly the problem :)
We mostly use UC on these pages, or WB within cache coherent domains.
mtrrs are totally useless in this situation.
In what sense does it not work?
oh I was mostly joking hence the smily.. really it just means thing
run slower than
> Yes. It is that wonderful time of the year again.
> No, no. We are not talking about holiday season or new year here.
>
> We are talking about one another rehash of "why we do not support PAT in x86"
> question and series of patches that implement some PAT support before going
> into
Yes. It is that wonderful time of the year again.
No, no. We are not talking about holiday season or new year here.
We are talking about one another rehash of "why we do not support PAT in x86"
question and series of patches that implement some PAT support before going
into hibernation again.
Yes. It is that wonderful time of the year again.
No, no. We are not talking about holiday season or new year here.
We are talking about one another rehash of why we do not support PAT in x86
question and series of patches that implement some PAT support before going
into hibernation again. Only
Yes. It is that wonderful time of the year again.
No, no. We are not talking about holiday season or new year here.
We are talking about one another rehash of why we do not support PAT in x86
question and series of patches that implement some PAT support before going
into hibernation
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