On 3/6/2017 5:17 PM, Vignesh R wrote:
>
>
> On Thursday 02 March 2017 07:59 PM, Boris Brezillon wrote:
>> On Thu, 2 Mar 2017 19:24:43 +0530
>> Vignesh R wrote:
[...]
>>>
>>> If its at SPI level, then I guess each individual drivers which cannot
>>> handle vmalloc'd buffers will have to impleme
On Thursday 02 March 2017 07:59 PM, Boris Brezillon wrote:
> On Thu, 2 Mar 2017 19:24:43 +0530
> Vignesh R wrote:
>
>>
> Not really, I am debugging another issue with UBIFS on DRA74 EVM (ARM
> cortex-a15) wherein pages allocated by vmalloc are in highmem region
> that are n
>>> Not really, I am debugging another issue with UBIFS on DRA74 EVM (ARM
>>> cortex-a15) wherein pages allocated by vmalloc are in highmem region
>>> that are not addressable using 32 bit addresses and is backed by LPAE.
>>> So, a 32 bit DMA cannot access these buffers at all.
>>> When dm
On Thu, Mar 02, 2017 at 08:49:00PM +0100, Boris Brezillon wrote:
> 1/ for big transfers, dynamically allocating a bounce buffer on demand
>(and freeing it after the DMA operation) might fail, or might induce
>some latency, especially when the system is under high mem pressure.
>Allocat
On 02/03/2017 16:25, Boris Brezillon wrote:
> On Thu, 2 Mar 2017 16:03:17 +0100
> Frode Isaksen wrote:
>
>> On 02/03/2017 15:29, Boris Brezillon wrote:
>>> On Thu, 2 Mar 2017 19:24:43 +0530
>>> Vignesh R wrote:
>>>
>>> Not really, I am debugging another issue with UBIFS on
On Thu, 2 Mar 2017 17:00:41 +
Mark Brown wrote:
> On Thu, Mar 02, 2017 at 03:29:21PM +0100, Boris Brezillon wrote:
> > Vignesh R wrote:
>
> > > Or SPI core can be extended in a way similar to this RFC. That is, SPI
> > > master driver will set a flag to request SPI core to use of bounce
>
On Thu, Mar 02, 2017 at 03:29:21PM +0100, Boris Brezillon wrote:
> Vignesh R wrote:
> > Or SPI core can be extended in a way similar to this RFC. That is, SPI
> > master driver will set a flag to request SPI core to use of bounce
> > buffer for vmalloc'd buffers. And spi_map_buf() just uses bounc
Le 02/03/2017 à 15:29, Boris Brezillon a écrit :
> On Thu, 2 Mar 2017 19:24:43 +0530
> Vignesh R wrote:
>
>>
> Not really, I am debugging another issue with UBIFS on DRA74 EVM (ARM
> cortex-a15) wherein pages allocated by vmalloc are in highmem region
> that are not addressab
On Thu, 2 Mar 2017 16:03:17 +0100
Frode Isaksen wrote:
> On 02/03/2017 15:29, Boris Brezillon wrote:
> > On Thu, 2 Mar 2017 19:24:43 +0530
> > Vignesh R wrote:
> >
> >>
> > Not really, I am debugging another issue with UBIFS on DRA74 EVM (ARM
> > cortex-a15) wherein pages al
On 02/03/2017 15:29, Boris Brezillon wrote:
> On Thu, 2 Mar 2017 19:24:43 +0530
> Vignesh R wrote:
>
>>
> Not really, I am debugging another issue with UBIFS on DRA74 EVM (ARM
> cortex-a15) wherein pages allocated by vmalloc are in highmem region
> that are not addressable u
On Thu, 2 Mar 2017 19:24:43 +0530
Vignesh R wrote:
>
> >>> Not really, I am debugging another issue with UBIFS on DRA74 EVM (ARM
> >>> cortex-a15) wherein pages allocated by vmalloc are in highmem region
> >>> that are not addressable using 32 bit addresses and is backed by LPAE.
> >>>
On 01/03/2017 17:55, Boris Brezillon wrote:
> On Wed, 1 Mar 2017 17:16:30 +0530
> Vignesh R wrote:
>
>> On Wednesday 01 March 2017 04:13 PM, Cyrille Pitchen wrote:
>>> Le 01/03/2017 à 05:54, Vignesh R a écrit :
On Wednesday 01 March 2017 03:11 AM, Richard Weinberger wrote:
> Vi
On Wed, 1 Mar 2017 17:16:30 +0530
Vignesh R wrote:
> On Wednesday 01 March 2017 04:13 PM, Cyrille Pitchen wrote:
> > Le 01/03/2017 à 05:54, Vignesh R a écrit :
> >>
> >>
> >> On Wednesday 01 March 2017 03:11 AM, Richard Weinberger wrote:
> >>> Vignesh,
> >>>
> >>> Am 27.02.2017 um 13:08 schri
On Wed, 1 Mar 2017 17:16:30 +0530
Vignesh R wrote:
> On Wednesday 01 March 2017 04:13 PM, Cyrille Pitchen wrote:
> > Le 01/03/2017 à 05:54, Vignesh R a écrit :
> >>
> >>
> >> On Wednesday 01 March 2017 03:11 AM, Richard Weinberger wrote:
> >>> Vignesh,
> >>>
> >>> Am 27.02.2017 um 13:08 schri
On Wed, Mar 01, 2017 at 03:21:24PM +0100, Cyrille Pitchen wrote:
> Besides, some SPI controller drivers may already use their own bounce
> buffer for other reasons. Then for those controllers, it would be one
> more copy.
They probably shouldn't, there's a lot of legacy drivers that do all
sorts
On Wed, 1 Mar 2017 15:21:24 +0100
Cyrille Pitchen wrote:
> + Mark
>
> Le 01/03/2017 à 12:46, Vignesh R a écrit :
> >
> >
> > On Wednesday 01 March 2017 04:13 PM, Cyrille Pitchen wrote:
> >> Le 01/03/2017 à 05:54, Vignesh R a écrit :
> >>>
> >>>
> >>> On Wednesday 01 March 2017 03:11 AM, Ri
Le 01/03/2017 à 15:28, Boris Brezillon a écrit :
> On Wed, 1 Mar 2017 15:21:24 +0100
> Cyrille Pitchen wrote:
>
>> + Mark
>>
>> Le 01/03/2017 à 12:46, Vignesh R a écrit :
>>>
>>>
>>> On Wednesday 01 March 2017 04:13 PM, Cyrille Pitchen wrote:
Le 01/03/2017 à 05:54, Vignesh R a écrit :
>>
+ Mark
Le 01/03/2017 à 12:46, Vignesh R a écrit :
>
>
> On Wednesday 01 March 2017 04:13 PM, Cyrille Pitchen wrote:
>> Le 01/03/2017 à 05:54, Vignesh R a écrit :
>>>
>>>
>>> On Wednesday 01 March 2017 03:11 AM, Richard Weinberger wrote:
Vignesh,
Am 27.02.2017 um 13:08 schrieb Vign
On Wed, 1 Mar 2017 17:16:30 +0530
Vignesh R wrote:
> On Wednesday 01 March 2017 04:13 PM, Cyrille Pitchen wrote:
> > Le 01/03/2017 à 05:54, Vignesh R a écrit :
> >>
> >>
> >> On Wednesday 01 March 2017 03:11 AM, Richard Weinberger wrote:
> >>> Vignesh,
> >>>
> >>> Am 27.02.2017 um 13:08 schri
On 01/03/2017 11:43, Cyrille Pitchen wrote:
> Le 01/03/2017 à 05:54, Vignesh R a écrit :
>>
>> On Wednesday 01 March 2017 03:11 AM, Richard Weinberger wrote:
>>> Vignesh,
>>>
>>> Am 27.02.2017 um 13:08 schrieb Vignesh R:
Many SPI controller drivers use DMA to read/write from m25p80 compatibl
Le 01/03/2017 à 05:54, Vignesh R a écrit :
>
>
> On Wednesday 01 March 2017 03:11 AM, Richard Weinberger wrote:
>> Vignesh,
>>
>> Am 27.02.2017 um 13:08 schrieb Vignesh R:
>>> Many SPI controller drivers use DMA to read/write from m25p80 compatible
>>> flashes. Therefore enable bounce buffers sup
On Wednesday 01 March 2017 03:11 AM, Richard Weinberger wrote:
> Vignesh,
>
> Am 27.02.2017 um 13:08 schrieb Vignesh R:
>> Many SPI controller drivers use DMA to read/write from m25p80 compatible
>> flashes. Therefore enable bounce buffers support provided by spi-nor
>> framework to take care of
Vignesh,
Am 27.02.2017 um 13:08 schrieb Vignesh R:
> Many SPI controller drivers use DMA to read/write from m25p80 compatible
> flashes. Therefore enable bounce buffers support provided by spi-nor
> framework to take care of handling vmalloc'd buffers which may not be
> DMA'able.
>
> Signed-off-b
Many SPI controller drivers use DMA to read/write from m25p80 compatible
flashes. Therefore enable bounce buffers support provided by spi-nor
framework to take care of handling vmalloc'd buffers which may not be
DMA'able.
Signed-off-by: Vignesh R
---
drivers/mtd/devices/m25p80.c | 1 +
1 file ch
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