On Fri, Dec 14, 2018 at 10:44:10AM -0800, Andy Lutomirski wrote:
>
> > On Dec 14, 2018, at 9:03 AM, Sean Christopherson
> > wrote:
> >
> > .pushsection .fixup, "ax"
> > 2:pop%rcx
> >test%rcx, %rcx
> >je3f
> >
> >mov%eax, EX_LEAF(%rcx)
> >mov%di,
> On Dec 14, 2018, at 9:03 AM, Sean Christopherson
> wrote:
>
>> On Fri, Dec 14, 2018 at 07:38:30AM -0800, Sean Christopherson wrote:
>>> On Fri, Dec 14, 2018 at 07:12:04AM -0800, Sean Christopherson wrote:
On Fri, Dec 14, 2018 at 09:55:49AM +, Jethro Beekman wrote:
> On
On Fri, Dec 14, 2018 at 10:20:39AM -0800, Josh Triplett wrote:
> On Fri, Dec 14, 2018 at 09:03:11AM -0800, Sean Christopherson wrote:
> > On Fri, Dec 14, 2018 at 07:38:30AM -0800, Sean Christopherson wrote:
> > > On Fri, Dec 14, 2018 at 07:12:04AM -0800, Sean Christopherson wrote:
> > > > On Fri,
On Fri, Dec 14, 2018 at 09:03:11AM -0800, Sean Christopherson wrote:
> On Fri, Dec 14, 2018 at 07:38:30AM -0800, Sean Christopherson wrote:
> > On Fri, Dec 14, 2018 at 07:12:04AM -0800, Sean Christopherson wrote:
> > > On Fri, Dec 14, 2018 at 09:55:49AM +, Jethro Beekman wrote:
> > > > On
On Fri, Dec 14, 2018 at 07:38:30AM -0800, Sean Christopherson wrote:
> On Fri, Dec 14, 2018 at 07:12:04AM -0800, Sean Christopherson wrote:
> > On Fri, Dec 14, 2018 at 09:55:49AM +, Jethro Beekman wrote:
> > > On 2018-12-14 03:01, Sean Christopherson wrote:
> > > >+2: pop %rbx
> > >
On Fri, Dec 14, 2018 at 07:12:04AM -0800, Sean Christopherson wrote:
> On Fri, Dec 14, 2018 at 09:55:49AM +, Jethro Beekman wrote:
> > On 2018-12-14 03:01, Sean Christopherson wrote:
> > >+2:pop %rbx
> > >+ pop %r12
> > >+ pop %r13
> > >+ pop %r14
> > >+ pop
On Fri, Dec 14, 2018 at 09:55:49AM +, Jethro Beekman wrote:
> On 2018-12-14 03:01, Sean Christopherson wrote:
> >+struct sgx_enclave_regs {
> >+__u64 rdi;
> >+__u64 rsi;
> >+__u64 rdx;
> >+__u64 r8;
> >+__u64 r9;
> >+__u64 r10;
> >+};
>
> This is fine, but why not just
On 2018-12-14 03:01, Sean Christopherson wrote:
+struct sgx_enclave_regs {
+ __u64 rdi;
+ __u64 rsi;
+ __u64 rdx;
+ __u64 r8;
+ __u64 r9;
+ __u64 r10;
+};
This is fine, but why not just cover all 13 normal registers that are
not used by SGX?
Minor
Intel Software Guard Extensions (SGX) SGX introduces a new CPL3-only
enclave mode that runs as a sort of black box shared object that is
hosted by an untrusted normal CPL3 process.
Enclave transitions have semantics that are a lovely blend of SYCALL,
SYSRET and VM-Exit. In a non-faulting
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