On Thu, 13 Nov 2014, Marc Zyngier wrote:
> On 12/11/14 14:46, Thomas Gleixner wrote:
> > On Wed, 12 Nov 2014, Marc Zyngier wrote:
> >> This patch introduces two optionnal fields to the msi_chip structure:
> >> - a pointer to an irq domain, describing the MSI domain associated
> >> with this msi_c
Hi Thomas,
On 12/11/14 14:46, Thomas Gleixner wrote:
> On Wed, 12 Nov 2014, Marc Zyngier wrote:
>> This patch introduces two optionnal fields to the msi_chip structure:
>> - a pointer to an irq domain, describing the MSI domain associated
>> with this msi_chip. To be populated with msi_create_ir
On 2014/11/12 22:46, Thomas Gleixner wrote:
> On Wed, 12 Nov 2014, Marc Zyngier wrote:
>> This patch introduces two optionnal fields to the msi_chip structure:
>> - a pointer to an irq domain, describing the MSI domain associated
>> with this msi_chip. To be populated with msi_create_irq_domain.
On Wed, 12 Nov 2014, Marc Zyngier wrote:
> This patch introduces two optionnal fields to the msi_chip structure:
> - a pointer to an irq domain, describing the MSI domain associated
> with this msi_chip. To be populated with msi_create_irq_domain.
> - a domain_alloc_irqs() callback that has the s
Hi Jiang,
On 09/11/14 15:10, Jiang Liu wrote:
> Some interrupt controllers, such as DMAR/HPET/HT_IRQ, work almost in
> the same as PCI MSI interrupt controller. And there some devices make
> use of PCI MSI mechanism for non-PCI devices on ARm/ARM64 platforms.
>
> So this patches tries to split PC
Some interrupt controllers, such as DMAR/HPET/HT_IRQ, work almost in
the same as PCI MSI interrupt controller. And there some devices make
use of PCI MSI mechanism for non-PCI devices on ARm/ARM64 platforms.
So this patches tries to split PCI MSI code into PCI dependent part
and PCI independent pa
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